Dorsey & Whitney LLP
Apparatuses and methods for refreshing memory cells of a semiconductor device
Apparatuses and methods for refreshing memory cells of semiconductor device are described. An example apparatus includes: a memory cell array including a plurality of memory groups each having a plurality of memory cells, the memory groups being selected by mutually different addresses; a first control circuit periodically executing a refresh operation on the memory groups in response to a first refresh command; and a second control circuit setting a cycle of executing the refresh operation by the first control circuit. The second control circuit sets the cycle to a first cycle until executing the refresh operation to all the memory groups after receiving the first refresh command, and the second control circuit sets the cycle to a second cycle that is longer than the first cycle after executing the refresh operation to all the memory groups.
Micron Technology, Inc.
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Hiroki Kenji
Fujisawa Yoshida