Slater Matsil, LLP
Source and drain dislocation fabrication in FinFETs
A device includes a semiconductor fin over a substrate, a gate dielectric on sidewalls of the semiconductor fin, and a gate electrode over the gate dielectric. A source/drain region is on a side of the gate electrode. A dislocation plane is in the source/drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.
Ting-Yun Zhiqiang Ya-Yun Hua Feng Tzer-Min Wen-Hsing Carlos H.
Wu Wu Cheng Chen Shen Hsieh Diaz