Shift register unit, gate driving circuit, and driving method
The present application provides a shift register circuit, a gate driving circuit including the shift register circuit, and a driving method applied to the shift register circuit. The shift register circuit includes an input sub-circuit, an output sub-circuit, an output reset sub-circuit, and a first capacitor, wherein the first capacitor is connected between the pull-up node and the second clock signal terminal, and configured to maintain a high level at the pull-up node through the second clock signal input at the second clock signal terminal. The shift register circuit further includes a second capacitor connected between the pull-down node and a first voltage input terminal, and configured to pull down a level at the pull-down node through a reverse bias voltage input at the first voltage input terminal during a blanking time after a frame of scanning ends.
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. BOE TECHNOLOGY GROUP CO., LTD.
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Pan Yongqian Meng Miao
Xu Li Li Zhang