Haynes and Boone, LLP
Resistive random access memory (RRAM) structure
A resistive random access memory (RRAM) cell comprises a transistor having a gate and a source/drain region, a bottom electrode having an upper surface coplanar with a top surface of the gate, a resistive material layer on the bottom electrode, a top electrode on the resistive material layer, and a conductive material connecting the bottom electrode to the source/drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Chin-Chieh Yu-Wen Wen-Ting Kuo-Chi Chih-Yang Hsia-Wei
Yang Liao Chu Tu Chang Chen