Pillsbury Winthrop Shaw Pittman, LLP
Error correcting apparatus and error correcting method
According to one embodiment, an error correction parity bit sequence is generated for a data sequence obtained by adding a dummy symbol of a specific pattern to a digital information sequence modulated to convert into a form satisfying the request of a reproducing system. If the parity bit sequence meets the request of the reproducing system, the modulated digital information sequence excluding the dummy symbol and the parity bit sequence are output in such a manner that the information sequence and parity bit sequence correspond to each other. If the parity bit sequence does not meet the request of the reproducing system, a dummy symbol of another pattern is added to the modulated digital information sequence, thereby generating an error correction parity bit sequence.
Kabushiki Kaisha Toshiba
G G
G11B G11B
inventional additional
Kenji
Yoshida