F. Chau & Associates, LLC.
Electrically erasable programmable read-only memory (EEPROM) device and methods of fabricating the same
An EEPROM device includes a device isolation layer disposed at a predetermined region of a semiconductor substrate to define active regions, a pair of control gates crossing the device isolation layers and an active region, a pair of selection gates interposed between the control gates to cross the device isolation layers and the active region and a floating gate and an intergate dielectric pattern stacked sequentially between the control gates and the active region The EEPROM device further includes a gate insulation layer of a memory transistor interposed between the floating gate and the active region and a tunnel insulation layer thinner than the gate insulation layer of the memory transistor and a gate insulation layer of a selection transistor interposed between the selection gates and the active region. The tunnel insulation layer is aligned at one side adjacent to the floating gate.
Samsung Electronics Co., Ltd.
H H
H01L H01L
inventional inventional
Jae-Hwang Seung-Beom Ju-Ri Chang-Hun Kwang-Wook Sung-Chul Sung-Ho
Kim Yoon Kim Lee Koh Park Kim