Cushman Darby & Cushman, IP Group of Pillsbury Madison & Sutro LLP
Bit line sensing circuit of a semiconductor memory device
 A bit line sensing circuit of a semiconductor memory device is disclosed which includes a pull-up control signal generator that enables the peak current to be small by supplying to the P sense amplifier a pull-up voltage of the low level in an initial sensing process. When the peak current is stabilized, the pull-up control signal generator then reduces the time required for raising the pull-up voltage by very quickly raising the voltage of the pull-up control signal. This results in the advantages that the peak current can be greatly reduced without slowing sensing speed, and voltage noise caused from peak currents can be eliminated. 
Samsung Electronics Co., LTD.
G G
G11C G11C
inventional inventional
Seung-Hun Hyun-Soon
Lee Jang