Cook Alex Ltd.
Semiconductor device
A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.
Semiconductor Energy Laboratory Co., Ltd.
H G H G H H G
H01L G06F H01L G11C H01L H01L G06F
inventional additional inventional inventional inventional inventional inventional
Masashi Yoshiyuki
Fujita Kurokawa