Eschweiler & Potashnik, LLC
Overlay sampling methodology
One embodiment relates to a method for overlay sampling. The method provides a number of fields over a semiconductor wafer surface. An inner subgroup of the number of fields includes fields in a central region of the wafer surface. An outer subgroup of the number of fields includes neighboring fields near a circumferential edge of the wafer surface. The method measures a first number of overlay conditions at a corresponding first number of overlay structures within a field of the inner subgroup. The method also measures a second number of overlay conditions at a corresponding second number of overlay structures within a field of the outer subgroup. The second number is greater than the first number. Based on the measured first number of overlay conditions and the measured second number of overlay conditions, the method determines an alignment condition for two or more layers on the semiconductor wafer surface.
Taiwan Semiconductor Manufacturing Co., Ltd.
G G
G01B G03F
inventional inventional
Yung-Yao Ying-Ying
Lee Wang