Dynamic random access memory device
A dynamic random access memory (DRAM) device includes a substrate, plural word lines and plural bit lines. The word lines are disposed in the substrate along a first trench extending along a first direction. Each of the word lines includes a multi-composition barrier layer, wherein the multi-composition barrier layer includes TiSixNy with x and y being greater than 0 and the multi-composition barrier layer is silicon-rich at a bottom portion thereof and is nitrogen-rich at a top portion thereof. The bit lines are disposed over the word lines and extended along a second direction across the first direction.
Fujian Jinhua Integrated Circuit Co., Ltd. UNITED MICROELECTRONICS CORP.
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H01L H01L H01L H01L H01L H01L
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Wei-Hsin Kai-Jiun Chih-Chieh Yi-Wei Tsun-Min Chia-Lung Jui-Min
Liu Chang Tsai Chen Cheng Chang Lee