Slater & Matsil, L.L.P.
CMOS devices with graded silicide regions
A semiconductor device includes a semiconductor substrate, a gate stack overlying the semiconductor substrate, a spacer on a sidewall of the gate stack, a lightly doped source/drain (LDD) region adjacent the gate stack, a deep source/drain region adjoining the LDD region, and a graded silicide region on the deep source/drain region and the LDD region. The graded silicide region includes a first portion having a first thickness and a second portion adjoining the first portion and having a second thickness substantially less than the first thickness. The second portion is closer to a channel region than the first portion.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Fu-Liang Hung-Ming Chien-Chao
Yang Chen Huang