Nath, Goldberg & Meyer
Low temperature poly-silicon transistor array substrate and fabrication method thereof, and display device
The embodiments of the present invention disclose a low temperature poly-silicon (LTPS) transistor array substrate and a method of fabricating the same, and a display device. The LTPS transistor array substrate comprises a substrate; a poly-silicon semiconductor active region provided on the substrate; a gate insulated from the poly-silicon semiconductor active region; and a dielectric spacer region provided on a side wall of the gate, wherein a portion of the poly-silicon semiconductor active region corresponding to the dielectric spacer region comprises a buffer region, and the dielectric spacer region surrounds the side wall of the gate and covers the buffer region.
BOE TECHNOLOGY GROUP CO., LTD.
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Zheng Xiaoyong Xiaolong Huijuan Dong Liang
Liu Lu Li Zhang Li Sun