WPAT, PC
Non-volatile memory with multi-level cell array and associated read control method
A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit and a judging circuit. The cell array includes plural multi-level memory cells in an m×n array. The cell array is connected with m word lines and n lines. The current supply circuit provides one of plural reference currents according to a current control value. The path selecting circuit is connected with the current supply circuit and the n bit lines. The judging circuit is connected with the path selecting circuit, and generates n output data. A first path selector of the path selecting circuit is connected with a path selecting circuit and a first bit line. A first judging device of the judging circuit is connected with the first path selector and generates a first output data.
EMEMORY TECHNOLOGY INC.
G G G G G G G G G
G11C G11C G11C G11C G11C G11C G11C G11C G11C
additional additional inventional inventional additional additional inventional inventional additional
Hung-Yi Chia-Fu Wei-Ming
Liao Chang Ku