Antonelli, Terry, Stout & Kraus, LLP
Semiconductor integrated circuit apparatus
There is disclosed a circuit apparatus which is highly tolerant to noises and operates at a higher speed than a conventional completely complementary static CMOS circuit. To achieve this, the circuit apparatus features a plurality of CMOS static logic circuits which are series-connected and potential setting circuitry which is connected to the output parts of these logic circuits and sets the outputs of the output parts to a low level in synchronization with a clock signal, thus propagating signals by operation of the NMOS circuit. In other words, a signal propagation delay occurs only when the N-type logic block conducts. Therefore, circuit operation is speeded up and &agr; particle noise and noises due to charge redistribution effect or leakage current can be prevented. There is also disclosed a parallel data processing apparatus which features such logic circuitry, the data processing apparatus having both a plurality of data processing units, each having a processor and a memory, and a plurality of hard disks.
Hitachi, Ltd.
H
H03K
inventional
Hiromichi Takashi Fumio Tatsumi
Yamada Hotta Murabayashi Yamauchi