Cooper Legal Group, LLC
Double patterning technology (DPT) layout routing
One or more techniques or systems for determining double patterning technology (DPT) layout routing compliance are provided herein. For example, a layout routing component of a system is configured to assign a pin loop value to a pin loop. In some embodiments, the pin loop value is assigned based on a mask assignment of a pin of the pin loop. In some embodiments, the pin loop value is assigned based on a number of nodes associated with the pin loop. DPT compliance or a DPT violation is determined for the pin loop based on the pin loop value. In this manner, odd loop detection associated with DPT layout routing is provided because a DPT violation results in generation of an additional instance of a net, for example. Detecting an odd loop allows a design to be redesigned before fabrication, where the odd loop would present undesired issues.
Taiwan Semiconductor Manufacturing Company Limited
G G
G06F G06F
inventional inventional
Fang-Yu Wen-Hao Yuan-Te Huang-Yu Chung-Hsing Yi-Kan
Fan Chen Hou Chen Wang Cheng