Marger Johnson & McCollom, P.C.
Semiconductor memory device having wordline enable signal line and method of arranging the same
Provided are a semiconductor memory device having a wordline enable signal line arrangement scheme, which can reduce VPP power consumption and can increase the speed of driving a sub-wordline, and a method of arranging wordline enable signal lines in the semiconductor memory device. In the semiconductor memory device, a wordline enable driver is arranged in a row decoder region outside a memory array region, and the wordline enable signal lines are formed of an uppermost metal layer among three metal layers constituting the semiconductor memory device. Each of the wordline enable signal lines is connected to a sub-wordline driver, rather than to a pair of sub-wordline drivers. In other words, the wordline enable signal lines vertically and horizontally extend forming an inverse L shape.
Samsung Electronics Co., Ltd.
G
G11C
inventional
Dae-Hee Yun-Sang Chul-Woo
Jung Lee Park