Reduced cross-talk noise high density signal interposer with power and ground wrap
An interposer for providing power, ground, and signal connections between an integrated circuit chip or chips and a substrate. The inventive interposer includes a signal core and external power/ground connection wrap. The two sections may be fabricated and tested separately, then joined together using z-connection technology. The signal core is formed from a conductive power/ground plane positioned between two dielectric layers. A patterned metal layer is formed on each dielectric layer. The two metal layers are interconnected by a through via or post process. The conductive power/ground plane functions to reduce signal cross-talk between signal lines formed on the two patterned metal layers. The power/ground wrap includes an upper substrate positioned above the signal core and a lower substrate positioned below the signal core. The upper and lower substrates of the power/ground wrap are formed from a dielectric film having a patterned metal layer on both sides, with the patterned layers connected by a through via or post process. The two power/ground wrap substrates may be formed separately or from one substrate which is bent into a desired form (e.g., a "U" shape). The two power/ground substrates are maintained in their proper alignment relative to the signal core and to each other by edge connectors which are also connected to the signal core's intermediary power/ground plane.
Fujitsu Limited
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Wen-chou Vincent Michael G. William Michael G. Yasuhito Solomon
Wang Lee Chou Peters Takahashi Beilin