WPAT, PC
Control method and controller for DRAM
A DRAM controller including a judging module, a determination module, and a transmission module is provided. The judging module judges an address content difference between a first command and a third command. The determination module determines a plurality of buffering address contents, associated with at least one second command, according to the address content difference. The transmission module then sequentially transmits the first command, the at least one second command, and the third command to the DRAM.
MStar Semiconductor, Inc.
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G06F G06F
inventional inventional
Hsian-Feng Yu-Lin Chung-Ching
Liu Chen Chen