Ryan, Mason & Lewis, LLP
Ion-sensitive field-effect transistor with micro-pillar well to enhance sensitivity
A semiconductor device includes a first passivation layer disposed on a semiconductor base. The semiconductor device further includes a dielectric layer disposed on the first passivation layer. The semiconductor device further includes a plurality of pillars disposed in an opening in the dielectric layer and the first passivation layer and from a top surface of the semiconductor base. The semiconductor device further includes a metal layer disposed on the exterior surfaces of the plurality of pillars and sidewalls of the dielectric layer and the first passivation layer and on the exposed top surface of the semiconductor base. The semiconductor device further includes a second passivation layer disposed on the metal layer and a top surface of the semiconductor device; wherein the second passivation layer has an electrical charge.
International Business Machines Corporation
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Juntao Kangguo Ruilong Chanro
Li Cheng Xie Park