Kilpatrick Townsend & Stockton LLP
Method to improve FinFET device performance
A method for manufacturing a semiconductor device includes providing a substrate structure having PMOS and NMOS regions. The PMOS region includes a first region, a first gate structure on the first region, and first source and drain regions on opposite sides of the first gate structure. The NMOS region includes a second region and a second gate structure on the second region. The method also includes introducing a p-type dopant into the first source and drain regions, performing a first annealing, forming second source and drain regions on opposite sides of the second gate structure, introducing an n-type dopant into the second source and drain regions, and performing a second annealing. The method satisfies thermal budget requirements of forming PMOS and NMOS devices, thereby enabling a better diffusion of the p-type dopant into the source and drain regions of the PMOS device without affecting the performance of the NMOS device.
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
H H H H H H H
H01L H01L H01L H01L H01L H01L H01L
inventional inventional inventional additional inventional inventional inventional
Yong
Li