Morgan, Lewis & Bockius LLP
Integrated circuit with timing adjustment mechanism and method
An integrated circuit device includes a receiver, a register and a clock circuit. The receiver samples data from an external signal line in response to an internal clock signal. The register stores a value that represents a timing offset to adjust the time at which the data is sampled. The clock circuit generates the internal clock signal such that the internal clock signal maintains a controlled timing relationship with respect to an external clock signal. The clock circuit includes an interpolator that phase mixes a set of reference clock signals such that the internal clock signal is phase offset in accordance with the value.
Rambus Inc.
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Jared LeVan Tsyr-Chyang Donald C. Benedict Chung-Kwong Jun Roxanne Mark A. Leung Stefanos Kevin S. Bruno W.
Zerbe Ho Stark Lau Kim Vu Horowitz Yu Sidiropoulos Donnelly Garlepp