William Park & Associates Ltd.
Semiconductor packages and methods for manufacturing the same
A semiconductor package and a method for manufacturing the same are provided. The semiconductor package may include a package substrate and at least one chip disposed on a first surface of the package substrate. The semiconductor package may include a boundary wall attached to the package substrate to surround the chip. The semiconductor package may include at least one bonding wire coupling the boundary wall to the package substrate. The semiconductor package may include a conductive roof covering a top surface of the boundary wall and extended to cover the first surface of the package substrate and the at least one chip.
SK HYNIX INC.
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Hyung Ju
Choi