Jianq Chyun IP Office
Method for fabricating semiconductor structure
A method for fabricating semiconductor structure is provided. A substrate having a plurality of blocks is provided. Each of the blocks includes a first region and a second region. The first region and the second region are disposed alternately. A plurality of composite layers is formed on the substrate. The top-most layer of the composite layers is patterned. A plurality of composite blocks is formed on the first region of the substrate. The composite layers and the composite blocks on the blocks are removed successively by a removal process. A staircase structure is formed on the substrate.
Powerchip Technology Corporation
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Jian-Lin Ta-Chien
Chen Chiu