Cooper Legal Group, LLC
Dual vertical channel
Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a first channel region and a second channel region that are formed according to at least one of a vertical channel configuration or a dual channel configuration. The first channel region operates as a first channel between a source region and a drain region of the semiconductor arrangement. The second channel region operates as a second channel between the source region and the drain region. A gate region, formed between the first channel region and the second channel region, operates to control the first channel and the second channel. Performance of the semiconductor arrangement is improved, such as an increase in current, because two current paths between the source region and the drain region are provided by the two channels.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
H H H H
H01L H01L H01L H01L
inventional inventional inventional additional
Chia-Ming Ru-Shang Ling-Sung Huang
Chang Hsiao Wang Jiun-Jie