Haynes and Boone, LLP
Method and system for wafer backside alignment
Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.
Taiwan Semiconductor Manufacturing Company, Ltd.
B
B81C
inventional
Sheng-Liang Sheng-Chieh Yuan-Bang Chia-Hung Tzu-Yang
Pan Liu Lee Kao Wu