Trop Pruner & Hu, P.C.
Pulse triggered flip flop
A pulse triggered flip flop circuit includes an exclusive OR clock generating stage that receives an input clock, data and produces an output clock pulse. The stage produces a output clock pulse that only goes away when the data is fully captured. The stage disables the output clock pulse only when the data is fully captured. Moreover, the circuit only toggles when the input data changes, reducing power consumption in some embodiments.
Intel Corporation
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inventional inventional inventional inventional
Anupama A. Kamal Abhishek R. Altug Wenyin Bhushan M.
Thaploo Sinha Appu Koker Fu Borole