Armstrong, Nikaido Marmelstein & Kubovcik
Read only memory device having memory cells each storing one of three states
 A read only memory device including: a memory cell array having a plurality of memory cells each storing one of three states; selection means, connected to the memory cell array, for selecting a pair of the memory cells from the memory cell array simultaneously in accordance with an address signal; a first sense amplifier, operatively connected to one of the pair of the memory cells, for producing a three bit output corresponding to the state stored in the one of the pair of the memory cells selected by the selection means; and a second sense amplifier, operatively connected another of the pair of memory cells, for producing a three bit output corresponding to the state stored in the another of the pair of the memory cells selected by the selection means. The device further includes decoder means, connected to the first and second sense amplifiers, for receiving the three bit outputs of the first and second amplifiers and producing a binary three bit output corresponding to the states stored in the pair of memory cells. 
Fujitsu Limited
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G11C G11C G11C
inventional additional inventional
Nobuo Yasuo Yasuaki
Ikuta Suzuki Suzuki