Jianq Chyun IP Office
Sense amplifier
The present disclosure provides a sense amplifier. The sense amplifier includes a first inverting circuit, a second inverting circuit, a capacitor, and a write-back path circuit. The first inverting circuit has a first input end and a first output end, and the first input end receives a first bit line signal from a memory cell. The second inverting circuit has a second input end and a second output end, wherein the second input is coupled to the first output end, and the second output end is coupled to the first input end, and the second input end receives a second bit line signal from the memory cell. The capacitor receives a boost signal and generates a boosted voltage according to the boost signal during a write-back timing period. The write-back path circuit transports the boosted voltage to one of the first and second input ends during the write-back timing period.
National Tsing Hua University
G G
G11C G11C
inventional inventional
Meng-Fan Yu-Lin
Chang Chen