Scully, Scott, Murphy & Presser, P.C.
Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness
The present invention provides a a method of fabricating bipolar junction transistors (BJTs) on selected areas of a very thin buried oxide (BOX) using a conventional silicon-on-insulator (SOI) starting wafer with a thick BOX. The reduced BOX thickness underneath the bipolar devices allows for a significantly reduced substrate bias compatible with the CMOS to be applied while maintaining the advantages of a thick BOX underneath the CMOS.
International Business Machines Corporation
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Paul A. Qiqing Mahender Christopher D. Michael D. Herbert L.
Papworth Ouyang Kumar Sheraw Steigerwalt Ho