F. Chau & Associates, LLP
Nonvolatile semiconductor memory device with a row decoder circuit
 A nonvolatile semiconductor memory device which comprises a memory cell array having a plurality of memory blocks each divided into a plurality of segments, each of which has a plurality of word lines, a plurality of bit lines arranged to intersect the word lines, and a plurality of memory cells connected to the word lines and the bit lines. The device has means for decoding segment select signals to generate a decode signal that selects one of the segments, and means connected to a first power node, for receiving word line select signals to select one of the word lines in the selected segment to output a first voltage applied to the first power node. In the nonvolatile semiconductor memory device, furthermore, a word line driver, which is connected to a second power node, applies the first voltage to the selected word line during read, write, and test modes of operation, and applies a second voltage supplied to the second power node to the selected word line during an erase mode of operation, in response to the decoded signal from the decoding means. 
Samsung Electronics Co., Ltd.
G G
G11C G11C
inventional inventional
Seoung-Keun Hwi-Taek
Lee Chung