Clock distribution techniques for channels
A circuit includes a first area, a second area, and a third area. The second area includes a locked loop circuit that generates a clock signal. The locked loop circuit receives a supply voltage that is isolated from noise generated in the first area. The third area includes multiple quads of channels and a clock line coupled to route at least one clock signal generated in the second area to the channels in each of the quads. The third area is separate from the second area in the circuit.
Altera Corporation
G
G06F
inventional
Tim Tri Wilson Thungoc M. Sergey
Hoang Wong Tran Shumarayev