Fliesler, Dubb, Meyer & Lovejoy, LLP
Program algorithm for low voltage single power supply flash memories
 A programming algorithm for a flash memory wherein programming circuitry is subdivided into a set of separately controllable groups. The algorithm detects a number of logic zeros to be programmed into a flash cell array by each group and switches among the groups such that a number of simultaneously programmed cells in the flash cell array does not exceed a predetermined number and such that maximum available programming current is used to enhance programming speed. 
Advanced Micro Devices, Inc.
G
G11C
inventional
Tiao Hua Johnny James C. Y. Chung K.
Kuo Chen Yu Chang