Hauptman Ham, LLP
PLL for carrier generator and method of generating carrier signals
A phase locked loop (PLL) for a carrier generator includes a front-end circuit that receives a frequency reference signal and generates a control signal based on the frequency reference signal and a feedback signal. A demultiplexer selectively outputs the control signal to a plurality of tuning arrangements. The plurality of tuning arrangements includes a first tuning arrangement that generates a first carrier signal based on the control signal and a second tuning arrangement that generates a second carrier signal based on the control signal. A multiplexer outputs the feedback signal based on the first carrier signal and the second carrier signal.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
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William Wu Chewn-Pu Lan-Chou Feng Wei Huan-Neng
Shen Jou Cho Kuo Chen