Toler Law Group, PC
System and method of programming a memory cell
A method includes selectively creating a first breakdown condition and a second breakdown condition at a semiconductor transistor structure. The first breakdown condition is between a source overlap region of the semiconductor transistor structure and a gate of the semiconductor transistor structure. The second breakdown condition is between ad rain overlap region of the semiconductor transistor structure and the gate.
QUALCOMM Incorporated
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Xia Bin
Li Yang