Merchant, Gould, Smith, Edell, Welter & Schmidt
Sense amplifier in a dynamic RAM having double power lines
 A sense amplifier for sensing and amplifying data existing at a pair of bit lines in a DRAM and having double power lines for supplying separate supply voltages to a P-channel sense amplifying unit and to an N-channel sense amplifying unit in a partially activatable DRAM and comprising a memory cell array apparatus having a pair of bit lines BL and BL is disclosed whereby a peak current occurrence in the partially activatable DRAM is prevented and the sensing ability of the sense amplifier is increased. 
Hyundai Electronics Industries Co., Ltd.
G H G
G11C H03K G11C
inventional inventional inventional
Jung P. Jong H.
Kim Oh