Oblon, Fisher, Spivak, McClelland & Maier
Semiconductor integrated circuit device in which difficulties caused by parasitic transistors are eliminated
 A semiconductor integrated circuit device comprising a CMOS circuit in which parasitic transistors form a parasitic thyristor circuit. In this device, noise absorption resistances are provided at the noise inputs to absorb noise which otherwise might become trigger pulses for the thyristors. 
Tokyo Shibaura Electric Co., Ltd.
H H
H03K H01L
inventional inventional
Yasoji Kazuo Mitsuhiko
Suzuki Satou Ueno