Semiconductor memory
 In the semiconductor memory of this invention, a first unit of data that is inputted by means of the same standard clock as an external address and that is inputted to a chip prior to determination of the internal address signal that is prefetched is latched to all latch circuits into which this data may be latched. After an address is determined by the next standard clock, second and succeeding units of data inputted to the chip are inputted only to latch circuits that are latched in accordance with address signals. In this way, even if internal address signal processing has not been completed at the time of latching the first unit of data, both the first unit of data and second and succeeding units of data can be latched in prefetch circuits designated by addresses from the outside. 
NEC Corporation
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inventional inventional inventional inventional
Mamoru
Fujita