Seed and Berry LLP
Self-protected circuit for non-selected programmable elements during programming
 A circuit is provided for programming antifuses while preventing other antifuses from being inadvertently programmed or stressed. The antifuses and programming circuits are arranged in a plurality of banks, each of which contains a plurality of programming circuits corresponding in number to the number of bits of an address signal. The bits of the address signal are applied to corresponding programming circuits in all of the banks. The programming circuits each include a antifuse select transistor coupling its respective antifuse to a bank select node for the bank. The antifuses in one of the banks are programmed by coupling the bank select node for that bank to ground through a bank select transistor. The antifuse select transistor in the programming circuit and the bank select transistor thus complete a current path from a programming node, through the antifuse and transistors to ground. However, the interconnection of the bank select transistor and the antifuse select transistor has a relatively high parasitic capacitance. As a result, significant current can be capacitively coupled through the bank select transistor of the nonselected bank, thereby inadvertently programming the antifuses in the nonselected bank. Inadvertent programming of antifuses in the nonselected bank is avoided by charging the parasitic capacitances of the bank select nodes in the nonselected banks. As a result, the antifuse select transistors in each of the programming circuits are maintained in an OFF condition, and the voltage across the parasitic capacitances remains relatively constant, thereby limiting the current flowing through the parasitic capacitances. 
Micron Technology, Inc.
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inventional additional inventional
Christopher Wen
Morzano Li