Kenyon & Kenyon
Backward inquiry to lower level caches prior to the eviction of a modified line from a higher level cache in a microprocessor hierarchical cache structure
A system and method for reducing the number of writeback operations performed by level two (L2) or higher level cache memories in a microprocessor system having an integrated hierarchical cache structure. Writeback operations of modified victim lines in L2 or higher level caches are cancelled if an associated cache line, having a "modified" status, is located in a lower level cache. In one embodiment of the present invention, writeback operations of modified victim lines in L2 or higher level caches are also cancelled if an associated cache line, having a "clean" status, is located in a lower level cache.
Intel Corporation
G G
G06F G06F
additional inventional
Wen-Hann Quinn
Wang Merrell