Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on wafers that include multiple steps for enabling NC detecteion of AACNT-TS via opens
Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of AACNT-TS via opens.
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John Christopher Carl Sheng-Che Hans Simone Nobuharu Indranil Conor Markus Kelvin Stephen Sherry Kimon Rakesh Vyacheslav Dennis Jeremy Jonathan Marci Andrzej Larg Tomasz Timothy Marcin Hideki
Kibarian Hess Taylor Lin Eisenmann Comensoli Yokoyama De O'Sullivan Rauscher Doong Lam Lee Michaels Vallishayee Rovner Ciplickas Cheng Haigh Liao Strojwas Weiland Brozek Fiscus Strojwas Matsuhashi