Skjerven, Morrill, MacPherson, Franklin & Friel
Lookaside buffer for inputting multiple address translations in a computer system
 A method and apparatus for performing address translation in a computer system supporting virtual memory by searching a translation lookaside buffer (TLB) and, possibly, a translation table held in memory and implemented as a B-tree data structure. The TLB is initially searched for a translation for a specified input address. If exactly one valid entry of the TLB stores a translation for the specified input address then the output address corresponding to the specified input address is determined from the contents of that entry. Otherwise, the translation table is searched for a translation for the specified input address. If two or more valid entries of the TLB store a translation for the specified input address, then these entries are invalidated. If the translation table must be searched then the method involves retrieving from the translation table, and inserting into the TLB, a translation for the specified input address and possibly one or more translations for other input addresses stored with the translation for the specified input address in one node of the B-tree implementing the translation table. When a particular input address retrieved from the translation table is inserted into the TLB, it is determined whether there is exactly one valid entry in the TLB that stores a translation for the particular input address If so, then the translation retrieved from the memory is inserted into that entry, and no multiple TLB entries for the same input address are created. 
Hal Computer Systems, Inc.
G G
G06F G06F
additional inventional
Chih-Wei David Leon Kuo-Liang Yolin
Chang Peng Lih