Garg Law Firm, PLLC
Asymmetric air spacer gate-controlled device with reduced parasitic capacitance
In a semiconductor device being fabricated, a gate structure, a first source/drain (S/D) structure, and a second S/D structure are formed. A first spacer of a first dielectric material is formed between the gate structure and the first S/D structure. A second spacer is formed between the gate structure and the second S/D structure, such that a first gap is created within a second dielectric material of the second spacer.
INTERNATIONAL BUSINESS MACHINES CORPORATION
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Son Juntao Kangguo Chanro
Nguyen Li Cheng Park