High latency interface between hardware components
A hard disk controller including a first circuit, a second circuit, a third circuit, and a mode circuit. The first circuit is configured to transmit a first signal to control data transfer between the hard disk controller and a read/write channel circuit. The second circuit is configured to transmit and receive data under control of the first signal. The third circuit is configured to transmit a second signal to control data transfer between a storage media and the read/write channel circuit. The mode circuit is configured to transfer mode data under control of the first signal and the second signal. The mode data indicates i) whether the data is continued from a previous sector or is associated with a new sector, and ii) a byte size of the data.
Marvell International Ltd.
G
G06F
inventional
Saeed
Azimi