Eschweiler & Potashnik, LLC
RRAM cell structure with laterally offset BEVA/TEVA
The present disclosure relates to a resistive random access memory (RRAM) device. The RRAM device has a bottom electrode arranged over a bottom electrode via. A variable resistive dielectric layer is arranged over the bottom electrode. The variable resistive dielectric layer extends to within a recess in an upper surface of the bottom electrode. A top electrode is disposed over the variable resistive dielectric layer. A top electrode via extends outward from an upper surface of the top electrode at a position centered along a first axis that is laterally offset from a second axis centered upon the recess within the upper surface of the bottom electrode. The top electrode via has a smaller total width than the top electrode.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Kuo-Chi Wen-Chun Yu-Wen Chih-Yang Wen-Ting Hsia-Wei Chin-Chieh Sheng-Hung
Tu You Liao Chang Chu Chen Yang Shih