Conley, Rose & Tayon
Microprocessor employing local caches for functional units to store memory operands used by the functional units
 A microprocessor employs a local cache for each functional unit, located physically close to that functional unit. The local caches are relatively small as compared to a central cache optionally included in the microprocessor as well. Because the local caches are small, internal interconnection delays within the local caches may be less than those experienced by the central cache. Additionally, the physical proximity of the local cache to the functional unit which accesses the local cache reduces the interconnect delay between the local cache and the functional unit. If the memory operand hits in a remote cache (either a different local cache or the central cache), the cache line containing the memory operand is transferred to the local cache experiencing the miss. According to one embodiment including multiple symmetrical functional units, the local caches coupled to the symmetrical functional units are restricted to storing different cache lines from each other. For example, a number of bits of the tag address may be used to select which of the local caches is to store the corresponding cache line. A data prediction scheme for predicting the functional unit to which a given instruction should be dispatched may be implemented, wherein the prediction is formed based upon the cache line storing the memory operand during a previous execution of the given instruction. 
Advanced Micro Devices, Inc.
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Thang M.
Tran