Amerson Law Firm, PLLC
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices
One method disclosed includes performing a selective etching process through a gate cavity to selectively remove a portion of a first semiconductor material relative to a second layer of a second semiconductor material and a substrate so as to thereby define a space between the second semiconducting material and the substrate, filling substantially all of the space with an insulating material so as to thereby define a substantially self-aligned channel isolation region positioned under at least what will become the channel region of the FinFET device.
GLOBALFOUNDRIES Inc.
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Wenhui Vimal K. Jason R. Nicholas V. Michael Ruilong Abner F.
Wang Kamineni Cantone LiCausi Wedlake Xie Bello