Method of fabricating gate stack having a reduced height
 An integrated circuit device having reduced-height gate stack is fabricated by using a patterned oxide hard mask to pattern the underlying metal layer. The oxide mask is removed and the patterned metal is subsequently used as a mask to etch the polysilicon layer. 
AT&T Corp.
Y H
Y10S H01L
additional inventional
Chun-Ting Kuo-Hua Chorng-Ping Ruichen
Liu Lee Chang Liu