Jaffery Watson Mendonsa & Hamilton LLP
Instructions and logic to perform floating point and integer operations for machine learning
A processing apparatus is provided comprising a multiprocessor having a multithreaded architecture. The multiprocessor can execute at least one single instruction to perform parallel mixed precision matrix operations. In one embodiment the apparatus includes a memory interface and an array of multiprocessors coupled to the memory interface. At least one multiprocessor in the array of multiprocessors is configured to execute a fused multiply-add instruction in parallel across multiple threads.
Intel Corporation
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Sanjeev Nicolas C. Balaji Eriko Rajkishore Ping T. Altug Vasanth Sanu K. Michael S. Tatiana Kamal Joydeep Himanshu Xiaoming Mark A. Tsung-Han Abhishek R. Anbang
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