Jianq Chyun IP Office
Wafer-level package structure
A wafer-level package structure, applicable to a flip-chip arrangement on a carrier, which comprises a plurality of contact points, is described. This wafer-level package structure is mainly formed with a chip and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The conductive layer can further be arranged at a region outside the bonding pads on the chip as a heat sink to enhance the heat dissipation ability of the package.
Advanced Semiconductor Engineering, Inc.
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Ho-Ming Tsung-Hua Chun-Chi Yung-Chi Su Jen-Kuang Min-Lung Chao-Fu Ching-Huei Yu-Chen Jau-Shoung
Tong Wu Lee Lee Tao Fang Huang Weng Su Chou Chen