Sughrue, Mion, Zinn, Macpeak & Seas
Semiconductor memory device
 A semiconductor memory device, wherein memory cell arrays MA11, 12, 13, . . . are arranged in a matrix. First driving circuits Da11, 12, 13, . . . and second driving circuits Db11, 12, 13, . . . are arranged alternately at the intersections of the word driver WD11, 12, 13, . . . columns and the sensing circuit SC11, 12, 13 . . . rows. The first driving circuits Da11, 12, 13, . . . serve to drive the sense amplifiers SA11, 12, 13, . . . of the sensing circuits SC11, 12, 13, . . . , and the second driving circuits Db11, 12, 13, . . . to drive the precharge circuits PC11, 12, 13, . . . and transfer circuits TG11, 12, 13, . . . so that a sensing circuit SC11, 12, 13, . . . is driven by the first and second driving circuits Da11, 12, 13, . . . and Db11, 12, 13, . . . on opposite sides of it. 
NEC Corporation
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G11C G11C G11C
inventional inventional inventional
Mamoru
Fujita