Finnegan, Henderson, Farbow, Garrett and Dunner
MOS-type charging circuit
 In a MOS-type charging circuit in a semiconductor chip using a supply voltage-lowering circuit, a driver MOS transistor is connected not to an output of the supply voltage-lowering circuit but directly to an external power supply. A comparison is made between the voltage at the terminal of the driver MOS transistor connected to a large-capacity capacity load and an output of the supply voltage-lowering circuit, i.e., an internal supply voltage of the chip. On the basis of the result of comparison, the gate potential of the driver MOS transistor is controlled, and the large-capacity load is charged to the level of the internal supply voltage of the chip. Hence, only one driver transistor can be used as conventionally required two driver transistors connecting the external power supply and the large-capacity load, so that the chip area can be reduced. In addition, since the large-capacity load is directly connected to the external power supply, it is possible to stably maintain the operation of the supply voltage-lowering circuit and the potential of the internal supply voltage which is its output. Hence, it is possible to prevent the malfunctioning of the chip and a decline in the operating margin due to fluctations in the internal supply voltage. Since a control circuit can be deactivated upon completion of charging the large-capacity load, a reduction in power consumption can be attained. 
Kabushiki Kaisha Toshiba
G
G11C
inventional
Syuso Takahiko Shigeyoshi
Fujii Hara Watanabe