Kilpatrick Townsend and Stockton LLP
JLT (junction-less transistor) device and method for fabricating the same
A method for fabricating a junction-less transistor device that includes a substrate, a buried dielectric layer having a fin structure on the substrate, a doped region formed through the buried dielectric layer in the substrate, a semiconductor layer overlying the buried dielectric layer and the doped region, a gate structure on the semiconductor layer, and source/drain regions in the semiconductor layer at opposite sides of the gate structure. The semiconductor layer includes first, second, third regions, with the second region interposed between the first and second regions and disposed underneath the gate electrode structure. The first, second, and third regions have a same doping polarity. The second region has a doping concentration less than those of the first and second regions. The second region and the doped region have opposite doping polarities. The second region has a groove in contact with a bottom portion of the gate structure.
Semiconductor Manufacturing International (Shanghai) Corporation
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H01L H01L H01L
inventional inventional inventional
Jinhua
Liu