Volentine & Whitt, PLLC
Method and apparatus for correcting errors in memory device
A memory controller analyzes read data received from a memory device and first error correction code (ECC) data of the read data. A control unit generates a plurality of sub-data from write data to be written in the memory device where the number of error bits in the read data is greater than a number of error bits that can be corrected using the first ECC data. An ECC block generates the first ECC data and second ECC data by using substantially the same algorithm to correct errors in each of the sub-data. The control unit transmits each of the sub-data, the first ECC data and the second ECC data to the memory device.
Samsung Electronics Co., Ltd.
G
G06F
inventional
Nam-Wook Chan Ik Hyun Jin Sung Joo
Kang Park Choi Yoo