Ladas & Parry LLP
Method of fabricating SiGe Bi-CMOS device
Provided is a method of fabricating a silicon germanium (SiGe) Bi-CMOS device. In the fabrication method, the source and drain of the CMOS device is formed using a silicon germanium (SiGe) heterojunction, instead of silicon, thereby preventing a leakage current resulting from a parasitic bipolar operation. Further, since the source and drain is connected with an external interconnection through the nickel (Ni) silicide layer, the contact resistance is reduced, thereby preventing loss of a necessary voltage for a device operation and accordingly, making it possible to enable a low voltage and low power operation and securing a broad operation region even in a low voltage operation of an analogue circuit.
Electronics and Telecommunications Research Institute
H
H01L
inventional
Jin Yeong Hyun Cheol Sang Hun Seung Yun
Kang Bae Kim Lee