Blakely, Sokoloff, Taylor & Zafman
Computer system that maintains system wide cache coherency during deferred communication transactions
 A computer system is disclosed having a requesting bus agent that issues a communication transaction over a bus and an addressed bus agent that defers the communication transaction to avoid high bus latency. The addressed bus agent later issues a deferred reply transaction over the bus to complete the communication transaction. Special snoop ownership and cache state transition rules maintain cache coherency and processor consistency during deferred communication transactions. 
Intel Corporation
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inventional additional inventional inventional
Nitin V. James M. Wen Han Matthew A. Amit Michael W.
Sarangdhar Brayton Wang Fisch Merchant Rhodehamel