Blakely, Sokoloff, Taylor & Zafman LLP
Selective high-k dielectric film deposition for semiconductor device
Embodiments of the present invention describe a method of fabricating a III-V quantum well transistor with low current leakage and high on-to-off current ratio. A hydrophobic mask having an opening is formed on a semiconductor film. The opening exposes a portion on the semiconductor film where a dielectric layer is desired to be formed. A hydrophilic surface is formed on the exposed portion of the semiconductor film. A dielectric layer is then formed on the hydrophilic surface by using an atomic layer deposition process. A metal layer is deposited on the dielectric layer.
Intel Corporation
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Willy Matthew V Mantu K. Marko
Rachmady Metz Hudait Radosavljevic