Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including stitch open configured fill cells
A process for making and using a semiconductor wafer includes instantiating first and second designs of experiments (DOEs), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of snake opens, and the second DOE contains fill cells configured to enable NC detection of stitch opens. The process may further include obtaining NC measurements from the first and/or second DOE(s) and using such measurements, at least in part, to selectively perform additional processing, metrology or inspection steps on the wafer, and/or on other wafer(s) currently being manufactured.
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Tomasz Marci Sheng-Che Vyacheslav Indranil Simone Rakesh Timothy Jonathan Jeremy Christopher Carl Conor Nobuharu Andrzej Markus Dennis John Kelvin Larg Hans Sherry Hideki Kimon Marcin Stephen
Brozek Liao Lin Rovner De Comensoli Vallishayee Fiscus Haigh Cheng Hess Taylor O'Sullivan Yokoyama Strojwas Rauscher Ciplickas Kibarian Doong Weiland Eisenmann Lee Matsuhashi Michaels Strojwas Lam