TraskBritt
Method and apparatus for encapsulating a multi-chip substrate array
The present invention provides an encapsulation method and apparatus that allows high throughput production of reliable, high quality board-on-chip packages, or other semiconductor die packages, from a multi-chip array arrangement on a carrier substrate. In an exemplary embodiment relating to a board-on-chip array, a mold is provided with an upper mold platen and a plurality of upper mold platen cavities for encapsulating wire bonds and related interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen and a lower mold platen cavity for encapsulating substantially the entire second side of the carrier substrate, to include a plurality IC chips mounted thereon in array fashion. Substrate support elements, in the form of standoffs pins or bosses, are provided for supporting the multi-chip carrier substrate during the encapsulation process. The standoff pins or bosses are configured to contact, or nearly contact, the die side area of the multi-chip carrier substrate to prevent or minimize substrate deflection during the fill of the mold cavities with encapsulant material. The standoff pins or bosses may be integral to a mold cavity or may be removable. The standoff pins or bosses may further be aligned along edges of lines representing a series of individual device packages. A singulation saw may be used to cut along marks left in the encapsulation to define individual device packages. The individual packages formed by the methods of the present invention may be used to construct a semiconductor device assembly.
Micron Technology, Inc.
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Todd O. David L.
Bolken Peters