Slater Matsil, LLP
Etching process control in forming MIM capacitor
A method includes forming a capacitor, which includes depositing a bottom electrode layer, depositing a capacitor insulator layer over the bottom electrode layer, depositing a top electrode layer over the capacitor insulator layer, and depositing a dielectric layer over the top electrode layer. The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate, and a ratio of the first etching rate to the second etching rate is higher than about 5.0.
Taiwan Semiconductor Manufacturing Company, Ltd.
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additional inventional inventional
Horng-Huei Yu-Cheng Hung-Hao Che-Cheng Wen-Tung
Tseng Liu Chen Chang Chen