Output driver having controlled slew rate
An off chip driver circuit is adapted to output differential output signals at high speed rate and capable to drive high external loads without degradation of the output signals. Specifically the driver comprises a first differential pair of transistors having first differential input terminals to respectively receive differential input signals and having first differential output terminals to output the differential output signals. A first current source circuit is connected to a first common terminal of each transistor of the first differential pair of transistors. The current source is sized to provide a first current flow upon receiving the differential input signals. The driver further comprises at least a second differential pair of transistors having second differential output terminals connected in parallel to the first differential output terminals. The second differential pair of transistors respectively receives delayed differential input signals of the differential input signals on respective second differential input terminals. At least a second current source circuit is connected to a second common terminal of each transistor of the second differential pair of transistors. The second current source is sized to provide a second current flow upon receiving the delayed differential input signals. The output driver is designed such that the delay between the first and the at least second differential input signals and the value of the first and the at least second current flows are adjusted to control the slew rate of the differential output signals.
International Business Machinesc Corporation
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additional inventional inventional
Christophe Guillaume Philippe
Degardin Vercasson Girard