Merchant & Gould P.C.
Injection-locked digital bang-bang phase-locked loop with timing calibration
A phase-locked loop circuit is disclosed. The circuit includes a digital bang-bang phase-locked loop (PLL) electrically connected to an input clock signal connection and an output clock signal connection, and a down-sampling circuit connected to the input clock signal connection. The circuit also includes a digitally-controlled delay line receiving an output of the down-sampling circuit, and an injection pulser receiving an output of the digitally-controlled delay line and connected to provide an injection pulse to a portion of the digital bang-bang phase-locked loop (PLL). The circuit further includes an injection timing calibration circuit connected to a control input of the digitally-controlled delay line. The circuit provides calibration of injection timing and bandwidth optimization, thereby reducing jitter in an output signal from the PLL.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
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Ruey-Bin Chih-Hsien Chin-Yang Ting-Kuei
Sheen Chang Wu Kuan