Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
Process controller for semiconductor manufacturing, utilizing dangerous pattern identification and process capability determination
A process control method comprises adjusting a process condition in consideration of a performance variation among a plurality of manufacturing apparatuses, the performance variation affecting a finished shape of a pattern used to manufacture a semiconductor device, running a simulation of the finished shape under the adjusted process condition, extracting a dangerous point of the pattern affecting satisfaction from the result of the simulation, comparing a first process capability serving as a judgment standard to find whether a production schedule of the device is achieved with a second capability serving to form a dangerous pattern containing the dangerous point, and improving the second process when the second process capability is lower than the first process capability.
Kabushiki Kaisha Toshiba
Y H G G H
Y02P H01L G05B G05B H01L
additional additional inventional inventional additional
Satoshi Ayako Kenji Toshiya
Tanaka Endo Yoshida Kotani