Blakely, Sokoloff, Taylor & Zafman LLP
III-N material structure for gate-recessed transistors
III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the source/drain layer and a III-N channel layer. An etch process, e.g., utilizing photochemical oxidation, selectively etches the source/drain layer over the etch stop layer. A gate electrode is disposed over the etch stop layer to form a recessed-gate III-N HEMT. At least a portion of the etch stop layer may be oxidized with a gate electrode over the oxidized etch stop layer for a recessed gate III-N MOS-HEMT including a III-N oxide. A high-k dielectric may be formed over the oxidized etch stop layer with a gate electrode over the high-k dielectric to form a recessed gate III-N MOS-HEMT having a composite gate dielectric stack.
Intel Corporation
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Marko Robert S. Ravi Uday Benjamin Niloy Jack T. Han Wui
Radosavljevic Chau Pillarisetty Shah Chu-Kung Mukherjee Kavalieros Then