Haynes and Boone, LLP
Method for forming metrology structures from fins in integrated circuitry
A method for forming a plurality of fins on a semiconductor substrate includes depositing a spacer layer to fill in gaps between the plurality of fins, the fins comprising a first material and the spacer layer comprising a second material. A first area is defined where the fins need to be broadened and a second area is defined where the fins do not need to be broadened. The method also includes patterning the spacer layer to remove spacers in the first area where the fins need to be broadened and applying an epitaxy process at a predetermined rate to grow a layer of the first material on fins in the first area. The spacer layer is removed in the second area where the fins do not need broadening.
Taiwan Semiconductor Manufacturing Company, Ltd.
H H
H01L H01L
inventional inventional
Chien-Hsun Ming-Feng Chih-Sheng
Wang Shieh Chang