Radiation-hard silicon cryo-CMOS process suitable for charge-coupled devices, and a device made according to this process
A silicon-based radiation-hard cryo-CMOS CCD process suitable for fabrication of devices (100) with sub-micron feature sizes. A re-oxidized nitride/oxide (RONO) layer (49&#8243;) is preserved in the CCD area (32) while plasma etching is used to define polysilicon 1 gates (50&#8242;) in the active FET area of the device. Thereafter, a wet chemical etching process, which does not destroy the integrity of the RONO layer (49&#8243;) in the CCD area, is carried out. A channel stop (48) is formed after the field oxidation step in the active FET area to reduce the space required for minimum diode breakdown voltage between the n+ source/drain region and the p+ channel stop.
Hughes Electronics
H H H
H01L H01L H01L
inventional inventional inventional
James S. Chen-Chi P.
Cable Chang