Hauptman Ham, LLP
Memory operation method and circuit
A method of operating a synapse array includes applying a pulse sequence to a resistor coupled between a row and a column of the synapse array, and in response to the applying the pulse sequence, lowering a conductance level of the resistor. Each pulse of the pulse sequence includes a pulse number, an amplitude, a leading edge, a pulse width, and a trailing edge, the trailing edge having a duration longer than a duration of the leading edge, and applying the pulse sequence includes increasing the pulse number while increasing one of the amplitude, the pulse width, or the trailing edge duration.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
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Chia-Wen Yu-Sheng Jau-Yi
Chang Chen Wu