Duane Morris LLP
System and method for calibrating chips in a 3D chip stack architecture
A system and method is disclosed for adaptively adjusting a driving strength of a signal between a first and second chip in a 3D architecture/stack. This may be used to adaptively calibrate a chip in a 3D architecture/stack. The system may include a transmission circuit on one chip and a receiver circuit on another chip. Alternatively, the system may include a transmission and receiver circuit on just one chip.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Chih-Hsien Ying-Yu Ruey-Bin
Chang Hsu Sheen