Harter Secrest & Emery LLP
Resistive memory accelerator
A method includes receiving, by a resistive memory array, a first data, the resistive memory array comprising a plurality of cells, wherein the receiving comprises setting a plurality of resistances on the plurality of cells, wherein each of the plurality of resistances are based on the first data. The method further includes receiving, by the resistive memory array, a second data, wherein the receiving comprises applying at least one of a current and a voltage based on the second data on the plurality of cells. The method still further includes determining, by the resistive memory array, an initial unknown value, the initial value based on the first data and the second data.
University of Rochester
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Engin Xiaochen Ravi Eby Mohammad Isaac Ji Kamil
Ipek Guo Patel Friedman Kazemi Richter Liu Pas