Marger Johnson & McCollom, P.C.
Input/output line structure of a semiconductor memory device
A semiconductor memory device including a plurality of memory blocks having associated with one or more circuit blocks therearound, and a plurality of input/output lines associated with the memory blocks, is disclosed. The input/output lines are divided into at least a first group and a second group. First portions of the input/output lines of the first group are arranged between the adjacent memory blocks while first portions of the input/output lines of the second group are arranged within the circuit blocks around the adjacent memory blocks. Second portions of the input/output lines of the first group are arranged on the circuits blocks around the memory blocks while second portions of the input/output lines of the second group are arranged between the adjacent memory blocks.
Samsung Electronics Co., Ltd.
G
G11C
inventional
Sang-Seok Yun-Sang Jae-Hoon Jong-Hyun
Kang Lee Joo Choi