Method to improve transistor matching
A method to adjust transistor gate geometries in a design data base to compensate for transistor-to-transistor active overlap of gate differences and to form a reticle. A method to adjust transistor geometries in a design data base to compensate for transistor-to-transistor active overlap of gate differences and to compensate for transistor turn on voltage drop off where the transistor gate crosses the isolation/active interface.
TEXAS INSTRUMENTS INCORPORATED
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Thomas John Rajni J. Chi-Chien Ashesh
Smelko Aggarwal Ho Parikh