Fish & Richardson P.C.
Semiconductor memory device having a low off state current and high repeatability
A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state (off-state current) between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or to the memory cell by applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another so that the predetermined amount of charge is held in the node. The memory window width is changed by 2% or less, before and after 1×109 times of writing.
Semiconductor Energy Laboratory Co., Ltd.
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Yusuke Yutaka Kiyoshi Shunpei
Sekine Shionoiri Kato Yamazaki