Enhanced ZDB feedback methodology utilizing binary weighted techniques
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to present a plurality of output clock signals and a first control signal in response to a reference clock signal and a feedback signal. The second circuit may be configured to select one of the plurality of output clock signals as the feedback signal in response to the first control signal.
Cypress Semiconductor Corp.
G H H
G06F H03L H03L
inventional inventional inventional
Daigo David
Katagiri Green