Tung & Associates
High performance strained channel MOSFETs by coupled stress effects
Strained channel transistors including a PMOS and NMOS device pair to improve an NMOS device performance without substantially degrading PMOS device performance and method for forming the same, the method including providing a semiconductor substrate; forming strained shallow trench isolation regions in the semiconductor substrate; forming PMOS and NMOS devices on the semiconductor substrate including doped source and drain regions; forming a tensile strained contact etching stop layer (CESL) over the PMOS and NMOS devices; and, forming a tensile strained dielectric insulating layer over the CESL layer.
Taiwan Semiconductor Manufacturing Co. Ltd.
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Weng Chu-Yun Cheng-Hung
Chang Fu Chang