Haynes and Boone, LLP
Resistive random access memory (RRAM) structure
A resistive random access memory (RRAM) cell comprises a transistor having a gate and a source/drain region, a bottom electrode coplanar with the gate, a resistive material layer over the bottom electrode, a top electrode over the resistive material layer, and a conductive material electrically connecting the bottom electrode to the source/drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Hsia-Wei Chih-Yang Yu-Wen Chin-Chieh Wen-Ting Kuo-Chi
Chen Chang Liao Yang Chu Tu