Duane Morris LLP
Built-in self-test for interposer
A device includes a first die coupled to an interconnect structure of an interposer. The first die includes a first BIST circuit configured to generate and output test signals to the interconnection structure of the interposer. A second die is coupled to the interconnect structure of the interposer and includes a second BIST circuit configured to receive signals from the interconnection structure of the interposer in response to the first BIST circuit transmitting the test signals. The second BIST circuit is configured to compare the signals received from the interconnection structure of the interposer to reference signals generated by the second BIST circuit.
Taiwan Semiconductor Manufacturing Co., Ltd.
G
G01R
inventional
Nan-Hsin Chin-Chou Ji-Jan
Tseng Liu Chen