Green, Howard & Mughal LLP
Method and apparatus of real-time retimer delay measurement
Described is an apparatus comprising a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may be an elastic buffer coupled to a received clock, a local clock, a received-clock data, and a local-clock data. The second circuitry may assert a first flag when a set of values on the received-clock data matches part of a skip ordered set. The third circuitry may assert a second flag when a set of values on the local-clock data matches part of the skip ordered set. The fourth circuitry may increment a count value upon assertion of the first flag and may stop incrementing the count value upon assertion of the second flag. In some embodiments, additional circuitries may extract a first timestamp from a packet, sum the first timestamp and the count value, and substitute the sum for the first timestamp within the packet.
Intel Corporation
G G G G G
G06F G06F G06F G06F G06F
inventional inventional additional inventional inventional
Huimin
Chen