Sterne, Kessler, Goldstein & Fox P.L.L.C.
Optimized layout cell
The present disclosure describes an example method for cell placement in an integrated circuit (IC) layout design. The method includes defining a layout unit for a circuit implementation and arranging multiple layout units into a layout cell. The method also includes editing the layout cell to connect a first set of the layout units to be representative of the circuit implementation and to connect a second set of the layout units to be representative of a non-functional circuit. Further, the method includes inserting one or more dummy fill structures in areas of the layout cell unoccupied by the first and second sets of layout units.
Taiwan Semiconductor Manufacturing Co., Ltd.
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inventional inventional inventional
Chuan-Yao Ruey-Bin Tien-Chien
Tan Sheen Huang