Hecker & Harriman
Data output circuit of a semiconductor memory device
 A data output circuit of a semiconductor memory circuit with pull-up and pull-down transistors for outputting data through complementary switching operation, comprising a pre-charge means for pre-charging a pair of data signals read from a memory cell having a given voltage level in a first operational mode, a switching means for connecting the output signal of the pre-charge means amplified to the gates of the pull-up and pull-down transistors, and an enable circuit for connecting the output signal of the switching means to the gates of the pull-up and pull-down transistors in a second operational mode. The switching means is a level change circuit to control the pull-up and pull-down transistors, which are data output drivers, by employing a constant voltage source to provide a voltage rise Vpp increased over the source voltage level Vcc of an integrated circuit before enabling the integrated circuit. The first and second operational mode respectively represent the disabling and enabling of the data output circuit to output the data. 
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inventional inventional inventional
Young-Rae Yun-Sang
Kim Lee