Haynes and Boone, LLP
Multiple-patterning overlay decoupling method
A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Jaw-Jung Shy-Jay Pei-Yi Wen-Chuan Burn Jeng
Shin Lin Liu Wang Lin