Distributed negative gate power supply
 A distributed negative gate power supply for generating and selectively supplying a relatively high negative voltage to control gates of memory cells in selected half-sectors via wordlines in an array of flash EEPROM memory cells during flash erasure. The distributed negative gate power supply includes a main charge pumping circuit (20a, 20b), a plurality of distribution sector pumping means (18a-18p). Each of the plurality of distribution sector pumping circuits is responsive to a half-sector select signal for selectively connecting the primary negative voltage to the wordlines of the selected half-sectors. 
Advanced Micro Devices, Inc.
G
G11C
inventional
Lee E. Johnny C. Chung K. Michael A.
Cleveland Chen Chang Van Buskirk