W&T/Qualcomm
Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage
Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage are disclosed. In one aspect, a bi-stable SRAM bit cell includes source and drain regions, and a gate region formed over a well region between the source and drain regions, which results in two (2) bipolar junction transistors (BJTs) formed within a bi-stable SRAM bit cell. A base tap region and a collector tap region are employed to provide voltages for read and write operations. The base tap region is formed beside a shallow trench isolation (STI) region having a bottom surface higher in a Y-axis direction in the well region than a bottom surface of the well region. The collector tap region is formed on one side of an STI region having a bottom surface lower in the Y-axis direction in the substrate than the bottom surface of the well region.
QUALCOMM Incorporated
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inventional additional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional
Bin Seung Hyuk Gengming Xia
Yang Kang Tao Li