WPAT, PC
Gate driving circuit on array applied to charge sharing pixel
The disclosure provides a gate driving circuit on array applied to a display panel with charge sharing pixel structure. In particular, the gate driving circuit is adapted to receive multi-phase clock signal and includes a plurality of shift registers. Each shift register includes a driving circuit including a first driving transistor and a second driving transistor, a pull-down unit and at least one pull-up unit, so that is capable of generating mutually non-overlapped main gate driving signal and sub gate driving signal. Furthermore, the advantage of the disclosure is to provide a gate driving circuit with simplified circuit structure and circuit layout.
AU OPTRONICS CORP.
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Chih-Ying Kuo-Chang Yu-Chung Yung-Chih
Lin Su Yang Chen