Conley, Rose & Tayon
Superscalar microprocessor having symmetrical, fixed issue positions each configured to execute a particular subset of instructions
 A microprocessor employing a reorder buffer is configured with fixed, symmetrical issue positions. The symmetrical nature of the issue positions may increase the average number of instructions to be concurrently dispatched and executed by the microprocessor. In one embodiment, the reorder buffer allocates a line of storage sufficient to store instruction results corresponding to a maximum number of concurrently dispatchable instructions regardless of the number actually dispatched. The average number of unused locations within the line decreases as the average number of concurrently dispatched instructions increases. 
Advanced Micro Devices, Inc.
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David B. Thang M.
Witt Tran