Garg Law Firm, PLLC
Transistor with recessed cross couple for gate contact over active region integration
A semiconductor structure includes a substrate having a first region and a second region, a first source/drain disposed on the substrate in the first region, an interlevel dielectric (ILD) disposed on the source/drain, and a first gate disposed on the substrate. The semiconductor structure further includes a first contact trench within the ILD extending to the first source/drain, a first trench contact within the first contact trench, and a first source/drain contact trench extending to the first trench contact. The semiconductor structure further includes a cross couple contact trench within the ILD, and a cross couple contact disposed in the cross couple contact trench in contact with the first gate and the first trench contact. The cross couple contact couples the first source/drain and the first gate.
INTERNATIONAL BUSINESS MACHINES CORPORATION
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Youngtag Guillaume Veeraraghavan S. Ruilong Jia Mahender Kangguo
Woo Bouche Basker Xie Zeng Kumar Cheng