Oliff & Berridge PLC
Semiconductor memory device having gate electrode, drain-drain contact, and drain-gate contact layers
The drain of a drive transistor Q3 and the drain of a load transistor Q5 are connected by a first drain&#8212;drain contact layer. The drain of a drive transistor Q4 and the drain of a load transistor Q6 are connected by a second drain&#8212;drain contact layer. The gate electrodes of the drive transistor Q3 and the load transistor Q5 (a first gate electrode layer) are connected to the second drain&#8212;drain contact layer by a first drain-gate contact layer. The gate electrodes of the drive transistor Q4 and the load transistor Q6 (a second gate electrode layer) are connected to the first drain&#8212;drain contact layer by a second drain-gate contact layer.
Seiko Epson Corporation
H
H01L
inventional
Satoru Takashi Masahiro Takafumi
Kodaira Kumagai Takeuchi Noda