Fish & Neave IP Group of Ropes & Gray LLP
Clock circuitry for programmable logic devices
A programmable logic device includes high-speed serial interface (“HSSI”) circuitry that employs one or more clock signals. In addition to use of these clock signals in the HSSI circuitry, circuitry is provided for allowing at least one of these signals to be distributed throughout the PLD core circuitry, e.g., for use as an additional clock signal in the PLD core. Clock distribution is preferably done in a low-skew way.
Altera Corporation
H H
H03K H03K
inventional inventional
Tim Tri Thungoc In Whan Sergey Yuryevich
Hoang Tran Kim Shumarayev