Volentine Francos & Whitt, PLLC
Basic cell of gate array semiconductor device, gate array semiconductor device, and layout method for gate array semiconductor device
A basic cell of a gate array semiconductor device, including first and second p-channel MOS transistors and first and second n-channel MOS transistors, wherein the first p-channel MOS transistor and the first n-channel MOS transistor are disposed so as to share or divide a first gate, the second p-channel MOS transistor and the second n-channel MOS transistor are disposed to share or divide a second gate, and the first and second gates have portions bent at about 45 degrees with respect to a lengthwise direction.
Oki Electric Industry Co., Ltd.
H G
H01L G06F
inventional inventional
Kenji Hidekazu
Arai Kikuchi