Schwegman Lundberg & Woessner, P.A.
Programmable clock data recovery (CDR) system including multiple phase error control paths
Some embodiments include apparatus having sampling circuitry, a first circuit path, a second circuit path, and a digitally controlled oscillator (DCO). The sampling circuit samples an input signal and provide data information and phase error information based on the input signal. A first circuit path provides proportional control information based on the data information and phase error information. A second circuit path provides integral control information based on the data information and phase error information. The first circuit path operates at a frequency higher than the second circuit path. The DCO generates a clock signal and controls the timing of the clock signal based on the integral control information and the proportional control information.
Intel Corporation
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Fulvio Ji Shenggao Guluke Michael
Spagna Chen Li Tong De Vita