Hauptman Ham, LLP
Data processing device with serial bus that needs initialization before use
A data processing device 1 comprises: first processors (2-i (i=1, 2, . . . , n)) that initialize the data processing device based on boot programs; a chip set (4) that includes first memories (4a-j (j=1, 2, . . . , m)) that store the first boot program (Pj (j=1, 2, . . . , m)) respectively and a memory controller (4b) that reads out the first boot program (Pj (j=1, 2, . . . , m)); second buses (5-i (i=1, 2, . . . , n)) that are arranged between the memory controller (4b) and the first processors (2-i (i=1, 2, . . . , n)) respectively, and do not require initialization based on boot programs before use; and first buses (3-i (i=1, 2, . . . , n)) that are connected with the first processors (2-i (i=1, 2, . . . , n)) and require initialization based on boot programs before use.
FANUC CORPORATION
G
G06F
inventional
Minoru Takashi
Nakamura Miyoshi