McGinn IP Law Group, PLLC
Comparison for redundant threads
The present invention provides a semiconductor integrated circuit device realizing improved detection of a failure while suppressing deterioration in performance. In a semiconductor integrated circuit device executing a plurality of threads while switching them synchronously with clocks, registers used for executing the threads are provided for the respective threads. Programs independent of each other and the same program as the threads are executed while being switched. In the case of executing the same program by a plurality of threads, a comparison circuit for comparing results of execution using registers provided in correspondence with the threads is provided.
Renesas Electronics Corporation
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Tsutomu Hiromichi Nobuyasu Kesami
Yamada Yamada Kanekawa Hagiwara