Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Dynamic random access memory device with the combined open/folded bit-line pair arrangement
 A semiconductor memory device includes active regions arranged on a semiconductor substrate such that those of the active regions which are adjacent in the word line direction deviate in the bit line direction, MOS transistors respectively formed in the active regions and each having a source and a drain one of which is connected to the bit line, a plurality of trenches each arranged to another set of source an drain regions and arranged to deviate in the word line direction in the respective active regions, those of the trenches which are adjacent with a through word line disposed therebetween being arranged to deviate in the bit line direction so as to be set closer to each other, a plurality of storage electrodes respectively formed in the trenches with capacitor insulative films disposed therebetween, and connection electrodes arranged between the word lines and each connecting the other of the source and drain to the storage electrode. 
Kabushiki Kaisha Toshiba
G G
G11C G11C
inventional additional
Tohru Yukihito Daisaburo Shigeyoshi Takeshi
Ozaki Oowaki Takashima Watanabe Hamamoto