Harness, Dickey & Pierce, P.L.C.
Semiconductor memory device having three-dimensionally arranged resistive memory cells
Semiconductor memory devices are provided. The device may include may include first and second selection lines connected to each other to constitute a selection line group, a plurality of word lines sequentially stacked on each of the first and second selection lines, vertical electrodes arranged in a row between the first and second selection lines, a plurality of bit line plugs arranged in a row at each of both sides of the selection line group, and bit lines crossing the word lines and connecting the bit line plugs with each other.
Samsung Electronics Co., Ltd.
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Youngwoo Jintaek Jungdal
Park Park Choi