Anova Law Group PLLC
Chip package structure and chip package method including bare chips with capacitor polar plate
Chip package structure and chip package method are provided. The chip package structure includes an encapsulating layer, a first metal layer, a second metal layer, and bare chips. The bare chips include first bare chips and second bare chips. First-connecting-posts are formed on a side of the first bare chips and on a side of the second bare chips. The encapsulating layer covers the bare chips and the first-connecting-posts. The first metal layer is disposed on the side of the first-connecting-posts away from the bare chips and includes first capacitor polar plates and conductive parts. The first capacitor polar plates are electrically connected to the first-connecting-posts on the first bare chips, and the conductive parts are electrically connected to the first-connecting-posts on the second bare chips. The second metal layer is disposed on a side of the first metal layer away from the encapsulating layer and includes second capacitor polar plates electrically connected to the conductive parts.
SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.
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Xiaohe Tingting Kerui Xuhui Feng Jine
Li Cui Xi Peng Qin Liu