McDermott Will & Emery LLP
Semiconductor device having dual-STI and manufacturing method thereof
A semiconductor device having a memory cell area and a peripheral circuit area includes a silicon substrate and an isolation structure implemented by a silicon oxide film formed on a surface of the silicon substrate. A depth of the isolation structure in the memory cell area is smaller than a depth of the isolation structure in the peripheral circuit area, and an isolation height of the isolation structure in the memory cell area is substantially the same as an isolation height of the isolation structure in the peripheral circuit area. Reliability of the semiconductor device can thus be improved.
Renesas Electronics Corporation
H H H H H
H01L H01L H01L H01L H01L
inventional inventional inventional inventional inventional
Noriyuki Takehiko Jun Yasusuke
Mitsuhira Nakahara Sumino Suzuki