Lowe Hauptman & Ham, LLP
Contact structure for reducing gate resistance and method of making the same
A semiconductor device having a gate on a substrate with source/drain (S/D) regions adjacent to the gate. A first dielectric layer overlays the gate and the S/D regions, the first dielectric layer having first contact holes over the S/D regions with first contact plugs formed of a first material and the first contact plugs coupled to respective S/D regions. A second dielectric layer overlays the first dielectric layer and the first contact plugs. A second contact hole formed in the first and second dielectric layers is filled with a second contact plug formed of a second material. The second contact plug is coupled to the gate and interconnect structures formed in the second dielectric layer, the interconnect structures coupled to the first contact plugs. The second material is different from the first material, and the second material has an electrical resistance lower than that of the first material.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Jye-Yen Hua-Chao Chung-Long Chun-Hung Harry-Hak-Lay Chih-Ping
Cheng Tseng Chang Chen Chuang Chao