Zhong Law, LLC
Joint compilation method and system for heterogeneous hardware architecture
The present invention provides a joint compilation method and system for a heterogeneous hardware architecture. The method comprises steps of: determining, according to calculation characteristics of heterogeneous units in the hardware architecture, a strategy for dividing an overall calculation task graph into a plurality of subtasks, and allocating the plurality of divided subtasks to corresponding heterogeneous unit compilers for compilation to generate corresponding target machine instruction codes; and, linking the generated target machine instruction codes to form a set of machine instruction codes oriented to the heterogeneous hardware architecture. With the joint compilation method and system of the present invention, an executable program body, which can run on a heterogeneous hardware architecture system and be mixed with hardware machine instruction codes of various heterogeneous units at different levels, can be automatically compiled, optimized and generated by activating one compilation.
SHANGHAI DENGLIN TECHNOLOGIES CO., LTD
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Fan Can Ping Xiaoquan Chenhui
Peng Li Wang Li Wang