Muir Patent Law, PLLC
Data output circuit and memory device including the same
A memory device may include a data output circuit configured to multiplex a plurality of data signals read from a memory cell array, wherein the data output circuit includes a clock boosting circuit configured to receive a plurality of internal clock signals generated based on a first power voltage, and to generate a plurality of boosted clock signals by boosting the plurality of internal clock signals based on a second power voltage having a voltage level greater than that of the first power voltage, and a data output driver configured to multiplex and output the plurality of data signals synchronized with the boosted clock signals.
SAMSUNG ELECTRONICS CO., LTD.
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Min-su Chang-kyo Seok-hun Won-young Yong-cheol Jung-hwan Bo-bae
Ahn Lee Hyun Lee Bae Choi Shin