Staas & Halsey LLP
Marginless status determination circuit
By including a unit for storing data to be determined, a unit for delaying the data, a unit for storing the output of the delay unit, and a unit for comparing the storage contents of the data before the delay with the storage contents of the data after the delay, and outputting a marginless status detection signal when they are different, the presence/absence of a margin is monitored regardless of ambient conditions by using an output marginless status detection signal as a switch control signal for a clock switch circuit, thereby operating electronic equipment without changing a frequency of a clock signal up to the critical condition.
Fujitsu Limited
G
G01R
inventional
Kenji Tetsuya Yoshihiko
Yoshida Yoshida Koike