System having double data transfer rate and intergrated circuit therefor
A system and an integrated circuit device therefor. The integrated circuit device comprises output driver circuitry to output data onto a first external signal line. The output driver circuitry outputs a first portion of data in response to a rising edge transition of a first external clock signal. The output driver circuitry outputs a second portion of data in response to a falling edge transition of the first external clock signal. The integrated circuit device may further include input receiver circuitry to sample data from a second external signal line. The input receiver circuitry samples a first portion of data in response to a rising edge transition of a second external clock signal. The input receiver circuitry samples a second portion of data in response to a falling edge transition of the second external clock signal.
Rambus Inc.
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inventional inventional additional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional
Mark Michael
Horowitz Farmwald