Antonelli, Terry, Stout & Kraus, LLP.
Floating-point addition/substraction processing apparatus and method thereof
 To offer a floating-point addition/subtraction processing apparatus and a method thereof, capable of shortening the computation time, the floating-point calculation processing apparatus includes an approximate shift mount predicting unit for predicting a shift amount for normalization by using the input floating-point data to be addition/subtraction processed within an error of 1 bit, a shift error detecting unit for detecting a difference between the predicted shift amount and a correct shift amount, and an bit shifter for correcting a result, obtained by normalization using the predicted shift amount, by the detected difference of the two shift amounts, wherein a round-off determination and a shift amount calculation are processed in parallel before a normalization shift processing is executed. 
Hitachi, Ltd.
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Hiromichi Fumio Yoshikazu Takashi Noriyasu Hideo Takahiro Tatsumi
Yamada Murabayashi Kiyoshige Hotta Ido Sawamoto Nishiyama Yamauchi