Anova Law Group, PLLC
Fin-FET devices and fabrication methods thereof
A method for fabricating a Fin-FET includes forming a plurality of fin structures, an isolation layer, and an interlayer dielectric layer on an NMOS region of a substrate, forming a first opening in the interlayer dielectric layer to expose a portion of the fin structures. A region adjacent to a joint between a bottom surface and a sidewall surface of the first opening is a corner region. The method includes forming a high-k dielectric layer on the bottom and the sidewall surfaces of the first opening, a barrier layer on the high-k dielectric layer, and an N-type work function layer containing aluminum ions on the barrier layer. The method further includes performing a back-flow annealing process such that the portion of N-type work function layer at the corner region is thickened and contains diffused aluminum ions. Finally, the method includes forming a metal layer on the N-type work function layer.
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
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Yong
Li