Schubert Osterrieder & Nickelson PLLC
Systems and methods for adaptively mapping an instruction cache
Systems and methods for adaptively mapping system memory address bits into an instruction tag and an index into the cache are disclosed. More particularly, hardware and software are disclosed for observing collisions that occur for a given mapping of system memory bits into a tag and an index. Based on the observations, an optimal mapping may be determined that minimizes collisions.
International Business Machines Corporation
G
G06F
inventional
Chih-jen Claude Jens Fabrice Jean Hans-Werner Colin Beaton Harm Peter Jean Louis
Chang Basso Leenstra Verplanken Tast Verrilli Hofstee Calvignac