Haynes and Boone, LLP
Systems and methods for providing a read only memory cell array
A Read Only Memory (ROM) cell array includes: a first transistor coupled to a first word line; a second transistor coupled to a second word line; and a third transistor disposed between the first transistor and the second transistor, the third transistor having a first gate terminal permanently coupled to a power rail.
QUALCOMM INCORPORATED
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inventional inventional
Paramjeet Bipin
Singh Duggal