Duane Morris LLP
Compression method and system for use with multi-patterning
A method comprises (a) providing an integrated circuit (IC) layout comprising data representing a plurality of circuit patterns to be formed on or in a single layer of an IC by multi-patterning; (b) dividing the plurality of circuit patterns into two or more groups; (c) assigning the circuit patterns within each group to a respective mask to provide mask assignment data, for forming each group of circuit patterns on or in the single layer of the IC; (d) compressing the mask assignment data; and (e) storing the compressed mask assignment data to a non-transitory machine readable storage medium for use by an electronic design automation tool configured for reconstructing the mask assignment data from the compressed data.
Taiwan Semiconductor Manufacturing Co, Ltd.
G Y G G G
G06F Y02P G06F G06F G03F
inventional additional additional inventional inventional
Chin-Hsiung Chung-Hsing Huang-Yu Wen-Hao
Hsu Wang Chen Chen