Haynes and Boone, LLP
Method for patterning interconnects
Various patterning methods involved with manufacturing semiconductor devices are disclosed herein. A method for fabricating a semiconductor structure (for example, interconnects) includes forming a patterned photoresist layer over a dielectric layer. An opening (hole) is formed in the patterned photoresist layer. In some embodiments, a surrounding wall of the patterned photoresist layer defines the opening, where the surrounding wall has a generally peanut-shaped cross section. The opening in the patterned photoresist layer can be used to form an opening in the dielectric layer, which can be filled with conductive material. In some embodiments, a chemical layer is formed over the patterned photoresist layer to form a pair of spaced apart holes defined by the chemical layer, and an etching process is performed on the dielectric layer using the chemical layer as an etching mask to form a pair of spaced apart holes through the dielectric layer.
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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Chun-Kuang Ta-Ching Yung-Sung Ming-Jhih Yu-Hsun Ru-Gun Chen-Hau Ken-Hsien
Chen Yu Yen Kuo Chen Liu Wu Hsieh