Finnegan, Henderson, Farabow, Garrett, & Dunner, L.L.P.
Method for fabricating semiconductor device with dual gate dielectric structure
Disclosed is a method for fabricating a semiconductor device with a dual gate dielectric structure. The method includes the steps of: sequentially forming a first oxide layer, a nitride layer and a second oxide layer on a substrate provided with a cell region for the NVDRAM and a peripheral circuit region for a logic circuit; forming a mask on the cell region; performing a first wet etching process by using the mask as an etch barrier to remove the second oxide layer formed in the peripheral circuit region; performing a second wet etching process by using the second oxide layer remaining in the cell region as an etch barrier to remove the nitride layer formed in the peripheral circuit region; forming a third oxide layer on the first oxide layer remaining in the peripheral circuit region; and forming a gate electrode on the second oxide layer and the third oxide layer.
Hynix Semiconductor Inc.
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Kwan-Yong Heung-Jae Seok-Kiu Se-Aug Hyun-Chul Hyo-Geun
Lim Cho Lee Jang Sohn Yoon