Low power synchronous memory command address scheme
A method for dynamically enabling address receivers in a synchronous memory array includes: controlling all address receivers to initially be in an off state; generating a command signal and generating an address signal; delaying the address signal so there is a latency between the command signal and the address signal; and selectively turning on an address receiver corresponding to the address signal when the command signal is received by the synchronous memory array.
Nanya Technology Corp.
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G11C G11C
inventional inventional
Phat Chia-Jen
Truong Chang