Jianq Chyun IP Office
Non-volatile memory and manufacturing method thereof
A manufacturing method of a non-volatile memory is provided. A tunneling dielectric layer, a first conductive pattern, and isolation structures are formed on a substrate. Using a first photoresist layer as a mask, the first conductive pattern is partially removed to form a first opening exposing the substrate. An insulating layer is formed to fill the first opening and cover the first conductive pattern and the isolation structures. Using a second photoresist layer shielding a portion of the first conductive pattern as a mask, the insulating layer surrounding the first conductive pattern is removed to form a patterned insulating layer having a second opening exposing a portion of the first conductive pattern. An inter-gate dielectric layer and a second conductive pattern are formed on the first conductive pattern to fill the second opening, the first conductive pattern forms a floating gate, and the second conductive pattern forms a control gate.
Powerchip Technology Corporation
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Hung-Kwei Ming-Feng Chih-Ping Ming-Yu
Liao Chang Chung Ho