Pearne & Gordon LLP
Wafer inspection interface and wafer inspection apparatus
A wafer inspection interface 18 includes a probe card 20 having a substrate 20a and a multiple number of probes 25 that are provided at a surface of the substrate 20a facing a wafer W and arranged to correspond to electrodes of a plurality of semiconductor devices formed on the wafer W; a pogo frame 40 that is in contact with a surface of the probe card 20 opposite to a surface of the probe card 20 facing the wafer W and supports the probe card 20; and a shim 51 provided on the surface of the probe card 20 in contact with the pogo frame 40 and configured to adjust a thickness of the probe card 20. The shim 51 has a cross shape when viewed from the top.
TOKYO ELECTRON LIMITED
G G
G01R G01R
inventional inventional
Hiroshi
Yamada