Alston & Bird LLP
High speed, low hardware footprint waveform
A method of capturing signals during hardware verification of a circuit design utilizes at least one field-programmable gate array (FPGA) and includes selecting, at run time and using one or more pre-compiled macros, a group of signals to be captured during verification of the circuit design and storing values of the group of signals in at least first and second random access memories disposed in the at least one FPGA. The first and second random access memories may be addressable spaces of the same random access memory.
SYNOPSYS, INC.
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Sébastien Roger Luc François Jean-Philippe Arturo Arnold Ching-Ping
Delerse Vidal Colrat Salz Mbotchak Chou