IP & T Group LLP
Memory device and method of operating the same
The present disclosure relates to an electronic device. A memory device having improved cache program operation performance according to the present technology includes a plurality of memory cells, each programmed in any one of first to n-th program state where n is a natural number greater than, a sensing latch configured to store data sensed from a bit line connected to a selected memory cell among the plurality of memory cells, and a plurality of data latches configured to temporarily store data to be stored in the selected memory cell.
SK hynix Inc.
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Hyung Jin
Choi