Toler Law Group, PC
System and method of programming a memory cell
A method includes creating a breakdown condition at a semiconductor transistor structure that includes an overlap region and a channel region. The breakdown condition is created by causing a first voltage difference between a gate of the semiconductor transistor structure and the overlap region to exceed a breakdown voltage of the semiconductor transistor structure while maintaining a second voltage difference between the gate and the channel region at less than the breakdown voltage.
QUALCOMM Incorporated
G G H G G G G G H H
G11C G11C H01L G11C G11C G11C G11C G11C H01L H01L
additional additional additional inventional inventional inventional additional inventional additional additional
Xia Seung H. Xiaochun
Li Kang Zhu