Ryan, Mason & Lewis, LLP
Method and structure for minimizing fin reveal variation in FinFET transistor
A method for manufacturing a semiconductor device includes forming a plurality of stacked portions spaced apart from each other on a substrate, each of the plurality of stacked portions including a semiconductor fin, a dielectric layer on the semiconductor fin, and a polymer layer on the dielectric layer. The method also includes forming an inter-level dielectric layer on the substrate between the plurality of stacked portions, forming a doped region in the inter-level dielectric layer at a depth below a top surface of the inter-level dielectric layer, and recessing the inter-level dielectric layer down to the doped region to form a plurality of isolation regions between the plurality of stacked portions.
International Business Machines Corporation
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Juntao Zhenxing Hao Kangguo
Li Bi Tang Cheng