Pillsbury Winthrop Shaw Pittman, LLP
Decoder and decoding method for decoding low-density parity-check codes with parity check matrix
In an LDPC-code decoder, bit-processing units are provided, respectively, for the 1st to Mth rows of the parity-check matrix that is formed of (r×s) permuted matrices having respective arrays of (m×m). Each of bit-processing units sequentially updates bit information corresponding to column positions included in the respective rows of the parity-check matrix, a bit at each of the column positions being set to “1”.Parity-processing units update parity information corresponding to row positions in columns of each column block of the parity-check matrix, whenever the bit-processing units have finished bit update computation for m column positions in each column block, a bit at each row position being set to “1”.The bit-processing units starts next bit update computation after the parity-processing units finish parity update computation for m columns of the first column block of the parity-check matrix.
Kabushiki Kaisha Toshiba
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H03M H03M H03M H03M
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Kenji
Yoshida