Green, Howard & Mughal LLP
Semiconductor devices with raised doped crystalline structures
Semiconductor devices including an elevated or raised doped crystalline structure extending from a device layer are described. In embodiments, III-N transistors include raised crystalline n+ doped source/drain structures on either side of a gate stack. In embodiments, an amorphous material is employed to limit growth of polycrystalline source/drain material, allowing a high quality source/drain doped crystal to grow from an undamaged region and laterally expand to form a low resistance interface with a two-degree electron gas (2DEG) formed within the device layer. In some embodiments, regions of damaged GaN that may spawn competitive polycrystalline overgrowths are covered with the amorphous material prior to commencing raised source/drain growth.
Intel Corporation
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Marko Sansaptak Seung Hoon Robert S. Sanaz K. Han Wui
Radosavljevic Dasgupta Sung Chau Gardner Then