Quine Intellectual Property Law Group
Booster power management integrated circuit chip with ESD protection between output pads thereof
A booster power management integrated circuit chip includes first and second output pads, a transistor switch coupled between the first and second output pads and having a gate, and a trigger circuit coupled between the first and second output pads and further coupled to the gate of the transistor switch. The trigger circuit drives the transistor switch to conduct when an instantaneous voltage larger than a trigger voltage level is present between the first and second output pads so as to enable electric current to flow through the transistor switch.
H H H H
H02M H03K H02M H03K
inventional additional additional additional
Jing-Meng Hung-Der Chiang-Yung
Liu Su Ku