Dority & Manning
Interdigitated capacitor with ball grid array (BGA) terminations
An improved low inductance capacitor and corresponding termination scheme is disclosed for grid array capacitors. The disclosed technology provides an interdigitated capacitor (IDC) capable of attaching ball grid array (BGA) terminated actives. The arrangement generally includes interleaved dielectric and electrode layers in an interdigitated configuration. Peripheral termination lands are then applied to the sides of the multilayer configuration to form electrical connections to exposed portions of the electrode layers. Selected edges of this IDC device are then preferably coated with a solder-stop material, thus providing a ball limiting metallurgy on the larger surfaces of the chip capacitor. Solder preforms may be applied directly to the peripheral terminations lands, providing a ball grid array (BGA) packaged chip ready to mount on a printed wire board and reflow. Composition of such solder balls is easily varied to comply with specific firing conditions. Such capacitor chips are also compatible with land grid array (LGA) packaging techniques. The interdigitated electrode design of the subject invention may be utilized to form a single multilayer capacitor or multiple discrete capacitors. Such a capacitor array may be formed by retaining the external configuration and internally subdividing the electrodes. The resulting low cost, low inductance capacitor is ideal for many high frequency applications requiring decoupling capacitors.
AVX Corporation
H H
H01L H01G
additional inventional
John L. Andrew P. Thomas
Galvagni Ritter Brown