Lowe Hauptman & Ham, LLP
Memory building blocks and memory design using automatic design tools
The memory building blocks can be used in conjunction with ASIC automatic design tools to generate a memory macro (e.g., a memory array) using a known ASIC design flow including, for example, register transfer level (RTL), synthesis, automatic place and route (APR) and timing analysis.
Taiwan Semiconductor Manufacturing Company, Ltd.
G
G06F
inventional
Subramani Chung-Cheng Hank Ming-Zhang Pey-Huey Bharath
Kengeri Chou Cheng Kuo Chen Upputuri