Staas & Halsey
Cache-memory system having multidimensional cache
 A prediction block address is generated from a current block address in accordance with a rule specified by a prediction mode signal. One of two cache memory banks is allocated as a current bank and the other is allocated as a prediction bank. When the current block address is stored in the prediction bank, the allocation of the current and prediction banks is reversed. When the prediction block address is not stored in the prediction bank, a data block specified by the prediction block address is block-read into the prediction bank. 
Fujitsu Limited
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G06F G06F G09G G09G
inventional inventional additional additional
Tatsushi Hideki
Otsuka Yoshizawa