Lorenz & Kopf, LLP
Integrated circuits, methods of forming the same, and methods of determining gate dielectric layer electrical thickness in integrated circuits
Integrated circuits, methods of forming integrated circuits, and methods of determining gate dielectric layer electrical thickness in integrated circuits are provided. An exemplary integrated circuit includes a semiconductor substrate including an active region and an STI structure disposed therein, adjacent to the active region. A first gate electrode structure overlies the active region and includes a first gate dielectric layer and a first gate electrode layer. A second gate electrode structure includes a second gate dielectric layer that overlies the first gate electrode layer and a second gate electrode layer that overlies the second gate dielectric layer. A source and drain region are formed in the active region, adjacent to the first gate electrode structure. First electrical interconnects are in electrical communication with the source and drain regions. A second electrical interconnect is in electrical communication with the first gate electrode layer.
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
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Wenhu Sung Mun Ling Yi Tat
Liu Jung Wu Lim