Arent Fox LLP
Multiple chip package and IC chips
A clock output pad and a return clock receiving pad are disposed on a logic chip at a portion near a side of an integrated circuit chip and a portion near another side of the integrated circuit chip that opposes to the side. A clock receiving pad is disposed on a memory chip at portion near the side and the other side respectively. The clock receiving pad is electrically connected to the clock output pad and the return clock receiving pad. A plurality of clock signals are supplied from the logic chip to the memory chip, and a plurality of return clock signals are returned from the memory chip to the logic chip.
Fujitsu Limited
H G G H
H01L G11C G11C H01L
additional inventional inventional additional
Toshiya Tatsushi Hiroyuki Hiroyoshi Fusao Shinnosuke Masanori
Uchida Otsuka Kobayashi Tomita Seki Kamata Kurita