Jacobson Holman, PLLC
Apparatus for buffering data strobe signal in high-speed memory device
 An apparatus for receiving an external data strobe signal in a high-speed memory device to generate an internal data strobe signal used in a write operation therein, includes first buffering means, activated by an enable signal, for receiving the external data strobe signal having a series of pulses to output a first internal data strobe signal having a series of pulses, each pulse of the first internal data strobe signal corresponding to a rising edge of each pulse of the external data strobe signal, and second buffering means, activated by the enable signal, for receiving the external data strobe signal having a series of pulses to output a second internal data strobe signal having a series of pulses, each pulse of the second internal data strobe signal corresponding to a falling edge of each pulse of the external data strobe signal, wherein a delay to a corresponding pulse of the first internal data strobe signal from a rising edge of each pulse of the external data strobe signal is substantially identical to a delay to a corresponding pulse of the second internal data strobe signal from a falling edge of each pulses of the external data strobe signal. 
Kyundai Electronics Industries Co., Ltd.
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Min-Ho Seung-Hyun
Yoon Yi