Haynes and Boone, LLP
Receiver with cancellation of intrinsic offset from decision feedback equalization to enhance data margin
A receiver is provided that generates a data sampling clock that is offset by clock offset that is a function of a decision feedback equalizer gain to account for a data sampling timing error that would occur without the clock delay.
QUALCOMM Incorporated
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Li Minhan Hadi Russell Chia Heng
Sun Chen Goudarzi Deans Chang