Workman, Nydegger & Seeley
Semiconductor structure including metal nitride and metal silicide layers over active area and gate stack
The present invention relates to a semiconductor structure including metal nitride and metal silicide, where a metal silicide layer is formed upon an active area that is part of a junction in order to facilitate further miniaturization that is demanded and dictated by the need for smaller devices. A single PECVD process makes three distinct depositions. First, a metal silicide forms by the reaction: MHal+Si+H2<CUSTOM-CHARACTER FILE="US06573571-20030603-P00900.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00001"/>MSix+HHal, where M represents a metal and Hal represents a preferred halogen or the like. Second, a metal nitride forms upon areas not containing Si by the reaction: MHal+N2+H2<CUSTOM-CHARACTER FILE="US06573571-20030603-P00900.TIF" ALT="custom character" HE="20" WI="20" ID="CUSTOM-CHARACTER-00002"/>MN+HHal. Third, a metal nitride forms upon areas of evolving metal silicide due to a diffusion barrier effect that makes formation of the metal silicide self limiting. Ultimately, a metal nitride layer will be uniformly disposed in a substantially uniform composition covering all underlying structures upon a semiconductor substrate. The inventive method can be used to form a semiconductor structure having a semiconductive substrate with an electrically active region therein, where a structure projects from the semiconductive substrate adjacent to the electrically active region. A first metal silicide is upon the electrically active region and a second metal silicide is upon the structure. A metal nitride layer extends continuously from the first metal silicide to the second metal silicide. An electrically conductive metallization material is upon the metal nitride layer.
Micron Technology, Inc.
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Weimin
Li