Anova Law Group, PLLC
Flip-flop
A flip-flop is provided. The flip-flop includes: a first inverter including an input terminal to receive data signal and an output terminal coupled to an input terminal of the master latch, a second inverter, a master latch including an output terminal coupled to an input terminal of a slave latch, and the slave latch including an output terminal coupled to an input terminal of the second inverter. An output terminal of the second inverter is configured as an output terminal of the flip-flop. A duration of the first clock signal inputted to the master latch is greater than a duration of the first clock signal inputted to the slave latch. A duration of the second clock signal inputted to the master latch is greater than a duration of the second clock signal inputted to the slave latch.
Semiconductor Manufacturing International (Shanghai) Corporation Semiconductor Manufacturing International (Beijing) Corporation
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H03K H03K H03K H03K
additional inventional inventional inventional
Yuan Jun Yan Fei Kai Hua Jian
Chai Wang Cai Hou Chen