The Marbury Law Group PLLC
Multi tier three-dimensional memory devices including vertically shared bit lines
A multi-tier memory device is formed over a substrate such that memory stack structures extend through an alternating stack of insulating layers and electrically conductive layers within each tier. Bit lines are formed between an underlying tier having drain regions over semiconductor channels and an overlying tier having drain regions under semiconductor channel, such that the bit lines are shared between the underlying tier and the overlying tier. Source lines can be formed over each tier in which source regions overlie semiconductor channels and drain regions. If another tier is present above the source lines, the source lines can be shared between two vertically neighboring tiers.
SANDISK TECHNOLOGIES LLC
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Wenguang Henry Xiaolong Zhenyu Christopher Koji James Tong Man Wei Gerrit Jan Jiyin Johann
Shi Chien Hu Lu Petti Miyata Kai Zhang Mui Zhao Hemink Xu Alsmeier