Gardere Wynne Sewell LLP
Input/output cell design for thin gate oxide transistors with restricted poly gate orientation
An input/output circuit layout has a first section in which first transistors having a thicker gate oxide are located and a second section in which second transistors having a thinner gate oxide are located. Due to process technology constraints, the gates of all of the second transistors are oriented in a single common direction. The second section has a perimeter having a square shape including a first edge and a second edge adjacent to the first edge. First connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to the first edge. Second connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to said second edge. The square shape and presence of pins on adjacent first and second edges permits rotation of the second section to fit within different orientations of the layout.
STMicroelectronics (Crolles 2) SAS STMicroelectronics International N.V.
G
G06F
inventional
Manoj Navin Kumar Jean
Kumar Dayani Guillorit