Semiconductor device and process for generating an etch pattern
A model-based approach for generating an etch pattern to decrease topographical uniformity involves placing reverse dummy features (50, 52, 70) in a region of a semiconductor substrate (40, 60) according to the topography of the region and adjacent regions. The reverse dummy features are placed inconsistently over the semiconductor substrate (40, 60) because the need for reverse dummy features is inconsistent and varies from design to design. In one embodiment, the reverse dummy features (50, 52, 70) having varying widths are placed with varying spacing between them and are placed in different regions. The determination of location, size and spacing of the reverse dummy features (50, 52, 70) is determined based upon the uniformity effect over the entire semiconductor die and may be used in conjunction with the placement of printed dummy features. After placing the reverse dummy features (50, 52, 70), a planarization process may be performed to remove the reverse dummy features, which improves the planarization.
Motorola, Inc. Advanced Micro Devices, Inc.
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H01L H01L
inventional inventional
Thomas M. Edward O. Jeffrey C.
Brown Travis Haines