Staas & Halsey
Memory device, method for reading information from the memory device, method for writing information into the memory device, and method for producing the memory device
 A memory device includes a first address signal line, a pair of second address signal lines, a standby signal line, and a memory cell provided at a cross point at which the first address signal line crosses the pair of second address signal lines. The memory cell includes first and second elements connected, via a connection node, in series between the pair of second address signal lines in a forward direction, each of the first and second elements having a negative-differential conductance characteristic. A threshold diode is connected between the first address signal line and the connection node, and has a characteristic in which a current flows in the threshold diode when a voltage applied across the threshold diode exceeds threshold voltages. A gate is connected to the standby signal line and controls currents flowing in the first and second elements. 
Fujitsu Limited
G G G H
G11C G11C G11C H01L
additional inventional inventional inventional
Toshihiko
Mori