Husch Blackwell LLP
Semiconductor memory device and semiconductor device
The semiconductor memory device includes an initialization memory cell having a first inverter circuit including a first transistor and a second transistor, and a second inverter circuit whose input portion is connected to an output portion of the first inverter circuit and output portion is connected to an input portion of the first inverter circuit, and including a third transistor and a fourth transistor. An absolute value of a threshold voltage of the third transistor is smaller than that of the first transistor.
Semiconductor Energy Laboratory Co., Ltd.
G H G G H
G06F H01L G11C G11C H01L
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Masashi
Fujita