Roberts Mlotkowski Safran Cole & Calderon, P.C.
Write scheme for a static random access memory (SRAM)
A structure includes a write driver circuit configured to drive both a true bitline side and a complement bitline side up to a power supply and down to ground such that one of the true bitline side and the complement bitline side is driven to ground and another of the true bitline side and the complement bitline side is driven to a high level at a same time and before a precharge below a level of the power supply of the one of the true bitline side and the complement bitline side.
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additional inventional inventional
Wei Hao Xiaoli
Zhao Pu Hu