Duane Morris LLP
Resistive random access memory device
A memory cell includes: a first contact feature partially embedded in a first dielectric layer; a barrier layer, lining the first contact feature, that comprises a first portion disposed between the first contact feature and first dielectric layer, and a second portion disposed above the first dielectric layer; a resistive material layer disposed above the first contact feature, the resistive material layer coupled to the first contact feature through the second portion of the barrier layer; and a second contact feature embedded in a second dielectric layer above the first dielectric layer.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Huei-Tsz Wei-Ming Po-Shu
Wang Wang Wang