Maschoff Brennan
Step height reduction of memory element
A semiconductor device includes an inter-metal dielectric layer, a memory cell, a transistor and a dielectric layer. The memory cell includes a metal-insulator-metal (MIM) structure over a top surface of the inter-metal dielectric layer. The transistor underlies the inter-metal dielectric layer. The dielectric layer extends over the transistor and along the top surface of the inter-metal dielectric layer. The dielectric layer is separated from the MIM structure.
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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Chih-Yang Hsia-Wei Kuo-Chi Chin-Chieh Wen-Ting Yu-Wen I-Ching Jen-Sheng Sheng-Hung
Chang Chen Tu Yang Chu Liao Chen Yang Shih