Harness, Dickey & Pierce, P.L.C.
System-on-chips and operation methods thereof
A system-on-chip includes a magnetic random access memory and a security interface. The magnetic random access memory includes a plurality of memory areas, each of the plurality of memory areas having a different security level. The security interface circuitry configured to: identify a memory area from among the plurality of memory areas based on a received memory address associated with a received memory command; determine a security level associated with the identified memory area; and perform a memory operation on received data based on the received memory command and the determined security level.
Samsung Electronics Co., Ltd.
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Jun-Ho Taekkyun Sang-hwa Sungkyoung Yong-Won
Seo Shin Jin Kim Jung