Foley & Lardner
Semiconductor integrated circuit device for linear quantization and inverse quantization
 A linear quantizer/ inverse quantizer comprises a first shifter coupled with a data input port for dividing the value indicated by an m-bit input data signal by two for producing a first digital output signal, a multiplier for multiplying the value of an m-bit input data signal by a coefficient indicated by lower (n-2) bits of an n-bit digital code signal two bits wider than a standard digital code signal theoretically required for the linear quantization, a second shifter for dividing the product by four for producing a second digital output signal indicative of the quarter of the product, and a selector unit having three input ports respectively supplied with the m-bit input data signal, the first digital output signal and the second digital output signal, and the selector unit is responsive to the higher two bits of the n-bit digital code signal for selectively coupling the three input ports with an output port thereof so that division is replaced with multiplication without deterioration of accuracy. 
NEC Corporation
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additional inventional inventional
Akira
Sawada