Sughrue, Mion, Zinn, Macpeak & Seas, PLLC
Semiconductor memory with burst mode feature for the redundant memory area
 In a semiconductor memory, the output of a ROM (Read Only Memory) storing the address of replacement with a redundant cell is compared with the leading address of a burst input to the memory from the outside. A signal representative of the coincidence the leading address and the replaced address is attained without waiting for the generation of internal addresses, so that a rapid access to a redundant cell array is achievable. The replacement to the redundant cell is effected collectively on a burst length basis. Alternatively, the replacement may be effected by activating the cell array with the coincidence signal, then comparing the internal addresses generated later with the replaced address in the burst, and then switching the input and output portion of each array. 
NEC Corporation
G
G11C
inventional
Mamoru
Fujita