Circuit for improving power supply rejection in an operational amplifier with frequency compensation
 A high gate output stage for use with an amplifier which has high power supply rejection and which is stable at all frequencies is provided. An output current source and current sink are connected in series with a Miller capacitor coupled between an input terminal and output terminal of the output stage. Error signals coupled from a power supply source are allowed to sum at the output terminal with a compensating signal. Compensation circuitry is coupled to the input terminal for charge coupling a substantially equal but opposite amount of compensation charge related to the error signal from the power supply, thereby substantially cancelling power supply error signal coupling. Therefore, excellent power supply rejection and frequency stability are provided in a high gain output stage. 
Motorola, Inc.
H
H03F
inventional
Roger A.
Whatley