Harness, Dickey & Pierce, P.L.C.
Controller, a method of operating the controller and a memory system
The present disclosure provides a controller which comprises a command generator configured to generate a command to non volatile memory, and buffer configured to receive a first data and a second data and configured to combine the first data and the second data, an ECC unit configured to perform the ECC decoding. And the first page data may include at least one error bit corresponding to an error location table and the second page data may include at least one original bit which can be replaced with the error bit. The buffer may replace the at least one error bit with the said at least one original bit. The error location table may save information of location for the repeated error bit.
Samsung Electronics Co., Ltd.
G G
G06F G11C
inventional additional
Chan Ik Nam-Wook Sung Joo Hyun Jin
Park Kang Yoo Choi