Blakely, Sokoloff, Taylor & Zafman LLP
Techniques for forming contacts to quantum well transistors
Techniques are disclosed for providing a low resistance self-aligned contacts to devices formed in a semiconductor heterostructure. The techniques can be used, for example, for forming contacts to the gate, source and drain regions of a quantum well transistor fabricated in III-V and SiGe/Ge material systems. Unlike conventional contact process flows which result in a relatively large space between the source/drain contacts to gate, the resulting source and drain contacts provided by the techniques described herein are self-aligned, in that each contact is aligned to the gate electrode and isolated therefrom via spacer material.
Intel Corporation
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Ravi Benjamin Willy Niloy Robert S. Jack T. Marko Mantu K.
Pillarisetty Chu-Kung Rachmady Mukherjee Chau Kavalieros Radosavljevic Hudait