Slater Matsil, LLP
Backside power rail structure and methods of forming same
Nanostructure field-effect transistors (nano-FETs) including isolation layers formed between epitaxial source/drain regions and semiconductor substrates and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a power rail, a dielectric layer over the power rail, a first channel region over the dielectric layer, a second channel region over the first channel region, a gate stack over the first channel region and the second channel region, where the gate stack is further disposed between the first channel region and the second channel region and a first source/drain region adjacent the gate stack and electrically connected to the power rail.
Taiwan Semiconductor Manufacturing Co., Ltd.
H H H H H H H H H H H H H H H H B H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L B82Y H01L H01L H01L H01L H01L H01L H01L
inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional inventional
Shi Ning Kuo-Cheng Chih-Hao Wen-Ting Chih-Chao
Ju Chiang Wang Lan Chou