Lowenstein Sandler LLP
Double threshold controlled scheduling of memory access commands
A processing device in a memory system provides an execution grant to a first queue of a plurality of queues, the first queue storing a first plurality of memory commands to be executed on the memory component. The processing device further determines whether a number of commands from the first queue that have been executed since the first queue received the execution grant satisfies an executed transaction threshold criterion and whether a number of pending commands in a second queue of the plurality of queues satisfies a promotion threshold criterion, the second queue storing a second plurality of memory commands to be executed on the memory component. Responsive to at least one of the executed transaction threshold criterion or the promotion threshold criterion being satisfied, the processing device provides the execution grant to the second queue.
Micron Technology, Inc.
G G G G
G06F G06F G11C G06F
inventional inventional additional inventional
Wei Jiangli Jason Chih-Kuo Ying Yu
Wang Zhu Duong Kao Tai