Patterson + Sheridan, LLP
Display control device and display panel module
A halt period is inserted between a drive period in an odd-numbered field and a drive period in an even-numbered field in interlace driving. When drive signals driving subpixels are time-divisionally supplied to the display panel in units of subpixel types, switch control signals controlling source line switches which distribute the drive signals associated with respective subpixels to the corresponding source lines are generated so that the number of switching of the source line switches are reduced.
Synaptics Japan GK
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Shigeru Atsushi Makoto Go
Ota Shikata Takeuchi Toyoda