Volentine & Whitt, PLLC
Variable resistance memory device and system
Disclosed is a semiconductor memory device including a memory cell array having a plurality of variable resistance memory cells divided into first and second areas. An I/O circuit is configured to access the memory cell array under the control of control logic so as to access the first or second area in response to an external command. The I/O circuit accesses the first area using a memory cell unit and the second area using a page unit.
Samsung Electronics Co., Ltd.
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Taek-Sung Yong-Jun Kwang-Ho Hyun-Ho Qi Hye-Jin Woo-Yeong Kwang-Jin
Kim Lee Kim Choi Wang Kim Cho Lee