IP & T Group LLP
Data output circuit and data output method thereof
A data output circuit and a data output method thereof are provided. The data output circuit includes a delay locked loop, a duty ratio correction block, and an output unit. The delay locked loop corrects a duty ratio of a first internal clock. The delay locked loop includes a correction enable signal output unit configured to output a correction enable signal when the operation of correcting the duty ratio of the first internal clock is completed. The duty ratio correction block corrects the duty ratio of the first internal clock by using a duty ratio detection signal in response to the correction enable signal, and outputs the corrected first internal clock as an output clock. The output unit detects a duty ratio of the output clock, generates the duty ratio detection signal to the duty ratio correction block, and outputs a data strobe signal in response to the output clock.
SK Hynix Inc.
H H H
H03K H03K H03L
inventional inventional inventional
Jun-Il
Chung