Read-write circuit for short bit line DRAM
A read-write circuit serving as a global sense amp for SBL (short bit line) DRAM is realized, wherein the read-write circuit includes a common line, such that the common line is used for connecting a read circuit, a latch circuit, a write circuit, a left select circuit and a right select circuit in the global sense amp for transferring write data to memory cells through a local sense amp and reading a stored data from the memory cells through the local sense amp. In doing so, the common line is useful for realizing a layout more effectively within a limited pitch, and also reducing area of the layout. And the read-write circuit is efficiently connected to a local sense amp in the short bit line memory architecture for reading and writing data. In addition, alternative circuits are described for implementing the read-write circuit for the short bit line DRAM.
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inventional inventional
Juhan
Kim