Fenwick & West, LLP
Method and apparatus for prioritizing and handling errors in a computer system
A computer system includes a central processing unit and a memory management unit having a plurality of functional units, such as a memory interface unit, a remote interface unit, a cache interface unit, and a translation unit. Each functional unit has a low priority error queue for storing error information for errors having a low priority. Some functional units also have a high priority error queue for storing error information for errors having a high priority error. Based on the status of the error queues, the memory management unit prioritizes and handles errors caused by hardware failures. For low priority errors, an interrupt request signal is sent to the central processing unit. For high priority errors, a RED ALERT signal is sent to the processing unit to cause the processing unit to give immediate attention to the error. For high priority error queue overflows, a failure signal is generated which causes the system to be halted and the contents of the system to be scanned out. Thus, errors are prioritized and handled accordingly.
Fujitsu Limited
G G
G06F G06F
inventional inventional
Joel Frederick Jaspal Chih-Wei David
Boney Kohli Chang