Harness, Dickey & Pierce, P.L.C.
Dynamically reconfigurable stages pipelined datapath with data valid signal controlled multiplexer
A pipelined datapath with dynamically reconfigurable pipeline stages is provided, having a pipeline controller which generates clock signals and selects signals based on a system clock and a valid data signal to control each of the registers and each of the multiplexers in the pipeline circuit. In other words, when a valid datum is being processed, the pipeline register is activated to latch the output of the combinational logic circuit; otherwise, when an invalid datum is received, the register is not activated and the datum bypasses the register through a multiplexer. Therefore, the pipeline stages of the pipelined datapath are dynamically reconfigured to save the power dissipation effectively.
Industrial Technology Research Institute
G
G06F
inventional
Chih-Wei Wei-Sheng Chan-Hao Chein-Wei Po-Han Tay-Jyi
Liu Huang Chang Jen Huang Lin