Harness, Dickey & Pierce, P.L.C.
Method of designing a system-on-chip including a tapless standard cell, designing system and system-on-chip
In a method of designing a system-on-chip including a tapless standard cell to which body biasing is applied, a slow corner timing parameter is adjusted to increase a slow corner of an operating speed distribution for the system-on-chip by reflecting forward body biasing, and a fast corner timing parameter is adjusted to decrease a fast corner of the operating speed distribution for the system-on-chip by reflecting reverse body biasing. The system-on-chip including the tapless standard cell is implemented based on the adjusted slow corner timing parameter corresponding to the increased slow corner and the adjusted fast corner timing parameter corresponding to the decreased fast corner. The slow corner timing parameter corresponds to a lowest value of an operating speed design window of the system-on-chip, and, the fast corner timing parameter corresponds to a highest value of the operating speed design window of the system-on-chip.
Samsung Electronics Co., Ltd.
G H G G
G06F H01L G06F G06F
inventional inventional additional inventional
Hyung-Ock Kee-Sup Jung-Yun Hyo-Sig Jae-Han
Kim Kim Choi Won Jeon