Duane Morris LLP
Stitch and trim methods for double patterning compliant standard cell design
A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process.
Taiwan Semiconductor Manufacturing Co., Ltd.
G G G
G06F G06F G06F
inventional additional inventional
Chin-Hsiung Huang-Yu Chung-Hsing
Hsu Chen Wang