Sughrue Mion, PLLC
Method of designing arrangement of TSV in stacked semiconductor device and designing system for arrangement of TSV in stacked semiconductor device
A method of designing arrangement of through silicon vias (TSVs) in a stacked semiconductor device is provided The method includes: determining a plurality of TSV candidate grids representing positions, into which the TSVs are insertable, in each of a plurality of semiconductor dies stacked mutually and included in a stacked semiconductor device; creating a plurality of path graphs representing linkable signal paths for a plurality of signals transmitted through the stacked semiconductor device, respectively, based on the TSV candidate grids; determining initial TSV insertion positions corresponding to shortest signal paths for the signals based on the path graphs; and determining final TSV insertion positions by verifying the initial TSV insertion positions so that a plurality of signal networks corresponding to the shortest signal paths for the signals have routability.
Industry-University Cooperation Foundation Hanyang University Samsung Electronics Co., Ltd.
G G G
G06F G06F G06F
inventional inventional additional
Min-Beom Wen Rui Jong-Wha Myung-Soo Cheol-Jon Jae-Rim
Kim Li Chong Jang Jang Lee