F. Chau & Associates, LLC
Semiconductor memory device having improved column selection lines and method of driving the same
A semiconductor memory device includes first and second global column selection lines via which first and second global column selection signals are respectively transmitted to select a column of a memory cell array, wherein the first and second global column selection signals are out of phase with each other and have a first frequency lower than a reference clock signal frequency; a pair of column selection gates connected to a pair of bit lines and a pair of input/output (I/O) lines, wherein gate terminals of the column selection gates are connected to different local column selection lines; and a logic operation unit performing a logic operation on the first and second global column selection signals and outputting a local column selection signal having a second frequency higher than the first frequency. The local column selection signal is applied to the gate terminals of the column selection gates via the local column selection lines.
Samsung Electronics Co., Ltd.
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Seung-Hoon
Lee