Schwabe, Williamson & Wyatt P.C.
GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation
Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation and methods of fabricating such Ge and III-V channel semiconductor devices are described. For example, a semiconductor device includes a semiconductor fin disposed above a semiconductor substrate. The semiconductor fin has a central protruding or recessed segment spaced apart from a pair of protruding outer segments along a length of the semiconductor fin. A cladding layer region is disposed on the central protruding or recessed segment of the semiconductor fin. A gate stack is disposed on the cladding layer region. Source/drain regions are disposed in the pair of protruding outer segments of the semiconductor fin.
Intel Corporation
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Willy Niti Matthew V. Ravi Robert S. Sansaptak Niloy Gilbert Stephen M. Marko Benjamin Harold W. Jack T. Van H.
Rachmady Goel Metz Pillarisetty Chau Dasgupta Mukherjee Dewey Cea Radosavljevic Chu-Kung Kennel Kavalieros Le