Schwegman, Lundberg, Woessner & Kluth, P.A.
Controller for delay locked loop circuits
A method of monitoring the characteristics of a delay locked loop (DLL) in a memory device during a test mode is provided. The DLL generates an internal clock signal based on an external clock signal. The external and internal clock signals are normally synchronized. DLL constantly responds to variations in operating condition of the memory device to keep the external and internal clock synchronized. The method involves preventing the DLL from responding to a change in operating condition such as a change in the supply voltage of the memory device during a test mode.
Micron Technology, Inc.
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inventional inventional inventional
Wen William Timothy B. Mark R. Daniel R.
Li Jones Cowles Thomann Loughmiller