Crowell & Moring LLP
Method for manufacturing a transistor having a low leakage current
 The invention provides a method for manufacturing a transistor having a low leakage current. In general, spacers must be formed to isolate a gate from a subsequently-formed drain, thereby reducing a leakage current. In the invention, the spacers are formed on the vertical sides of the gate by using a selective deposition process. Therefore, the method for manufacturing a transistor having a low leakage current according to the invention not only constitutes a simplified process, but also controls the widths of the spacers precisely, so that the leakage current of the transistor can be greatly decreased. 
National Science Council
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Ting-Chang Po-Sheng Chun Yen Hsiao-Yi
Chang Shih Chang Lin