Staas & Halsey
ECL gate array with collector resistance compensation for distance from power supply pad
 An ECL gate array comprising a plurality of basic cells. Each basic cell has a pair of emitter-coupled transistors, and a load connected between the collectors of the transistors and a power supply line. In accordance with a circuit design information, the resistance value of the load can be selected for increasing a noise margin of the output logic levels without deteriorating the switching speed. 
Fujitsu Limited
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inventional inventional inventional
Yasunori Kazumasa Mitsuhisa
Kanai Nawata Shimizu