Haynes and Boone, LLP
Iterative rinse for semiconductor fabrication
An iterative rinse for fabrication of semiconductor devices is described. The iterative rinse includes a plurality of rinse cycles, wherein each of the plurality of rinse cycles has a different resistivity. The plurality of rinse cycles may include a first rinse of a semiconductor substrate with de-ionized (DI) water and carbon dioxide (CO2), followed by a second rinse the semiconductor substrate with DI water and CO2. The first rinse has a first resistivity; the second rinse has a second resistivity lower than the first resistivity.
Taiwan Semiconductor Manufacturing Company, Ltd.
G H
G03F H01L
inventional inventional
Ping-Hsi Yung-Yao Li-Shiuan Wei-Hong
Yang Lee Chen Chuang