Jaffery Watson Mendonsa & Hamilton LLP
Compute optimizations for neural networks using bipolar binary weight
One embodiment provides for a compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction that specifies multiple operands including a multi-bit input value and a bipolar binary weight associated with a neural network and an arithmetic logic unit including a multiplier, an adder, and an accumulator register. To execute the decoded instruction, the multiplier is to perform a multiplication operation on the multi-bit input based on the bipolar binary weight to generate an intermediate product and the adder is to add the intermediate product to a value stored in the accumulator register and update the value stored in the accumulator register.
Intel Corporation
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Kamal Kevin Xiaoming Eriko Elmoustapha Tsung-Han Rajkishore Sara S. Nicolas C. Anbang Balaji
Sinha Nealis Chen Nurvitadhi Ould-Ahmed-Vall Lin Barik Baghsorkhi Galoppo Von Borries Yao Vembu