Ryan, Mason & Lewis, LLP
Method and structure for minimizing fin reveal variation in FinFET transistor
A semiconductor device includes a plurality of fins spaced apart from each other on a substrate; a liner layer on the substrate between each fin of the plurality of fins and on at least a portion of a sidewall of each fin; and a plurality of isolation regions adjacent and between the plurality of fins. The plurality of isolation regions are on a top surface of the liner layer on the substrate and includes a dielectric layer; and a doped region on the dielectric layer.
International Business Machines Corporation
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Zhenxing Hao Juntao Kangguo
Bi Tang Li Cheng