Oblon, McClelland, Maier & Neustadt, L.L.P
Semiconductor package including a plurality of chips
A reconfigured wafer of resin-encapsulated semiconductor packages is obtained by supporting with a resin, thereafter, a grinding process is performed on top and backside surfaces to expose only a bump interconnection electrode on a surface of a semiconductor chip. Further, a chip-scale package is obtained by a dicing process along a periphery of the chip.
Kabushiki Kaisha Toshiba
H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L
additional inventional inventional inventional additional additional inventional inventional inventional additional additional additional additional additional inventional additional additional inventional inventional additional additional additional inventional additional additional additional inventional inventional additional inventional inventional additional additional inventional inventional inventional inventional
Yutaka Atsuko Hiroshi Kazuhiko
Onozuka Iida Yamada Itaya