Harness, Dickey & Pierce, P.L.C.
Semiconductor package and method of manufacturing the semiconductor package
A semiconductor package includes a mold substrate, at least one semiconductor chip disposed in the mold substrate and including chip pads, and a redistribution wiring layer covering a first surface of the mold substrate and including a first redistribution wiring and a second redistribution wiring stacked in at least two levels to be electrically connected to the chip pads. The first redistribution wiring includes a signal line extending in a first region, and the second redistribution wiring includes a ground line in a second region overlapping with the first region. The ground line has a plurality of through holes of polygonal column shapes.
Samsung Electronics Co., Ltd.
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Jaegwon Jongyoun Inwon Seokhyun Yeonho
Jang Kim O Lee Jang