Hauptman Ham, LLP
Gated tri-state inverter, and low power reduced area phase interpolator system including same, and method of operating same
A phase interpolating (PI) system includes: a phase-interpolating (PI) stage configured to receive first and second clock signals and a multi-bit weighting signal, and generate an interpolated clock signal, the PI stage being further configured to avoid a pull-up/pull-down (PUPD) short-circuit situation by using the multi-bit weighting signal and a logical inverse thereof (multi-bit weighting_bar signal); and an amplifying stage configured to receive and amplify the interpolated clock signal, the amplifying stage including a capacitive component; the capacitive component being tunable; and the capacitive component having a Miller effect configuration resulting in a reduced footprint of the amplifying stage.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H H H H H
H03K H03K H03K H03K H03K
additional additional additional inventional inventional
Chin-Ming Chih-Hsien Tsung-Che
Fu Chang Lu