Haynes and Boone, LLP
Resistive memory reset
A resistive memory cell includes a switch and a resistive switching device. The switch includes a first terminal connected to a select line and a gate terminal connected to a word line. The resistive switching device is connected between a second terminal of the switch and a bit line. The resistive switching device is resettable by having a positive bias applied to the word line and a negative bias applied to the bit line.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Yu-Wen Hsia-Wei Chin-Chieh Wen-Ting Chih-Yang Kuo-Chi
Liao Chen Yang Chu Chang Tu