Eschweiler & Potashnik, LLC
Deep trench isolation fabrication for BSI image sensor
The present disclosure relates to an integrated circuit, and an associated method of formation. In some embodiments, the integrated circuit comprises a deep trench grid disposed at a back side of a substrate. A passivation layer lines the deep trench grid within the substrate. The passivation layer includes a first high-k dielectric layer and a second high-k dielectric layer disposed over the first high-k dielectric layer. A first dielectric layer is disposed over the passivation layer, lining the deep trench grid and extending over an upper surface of the substrate. A second dielectric layer is disposed over the first dielectric layer and enclosing remaining spaces of the deep trench grid to form air-gaps at lower portions of the deep trench grid. The air-gaps are sealed by the first dielectric layer or the second dielectric layer below the upper surface of the substrate.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Dun-Nian Hsiao-Hui Shih Pei Chih-Hui Sheng-Chan Ching-Chun Shyh-Fann Yen-Ting
Yaung Tseng Chou Huang Li Wang Ting Chiang