Tutunjian & Bitetto, P.C.
Self-aligned vertical fin field effect transistor with replacement gate structure
A method of forming a vertical field effect transistor device is provided. The method includes forming one or more fin stacks on a substrate, wherein the fin stacks include a lower junction plate, a vertical fin on the top surface of the lower junction plate, and an upper junction plate on the top surface of the vertical fin. The method further includes removing a portion of the lower junction plate and upper junction plate to form recessed spaces, and forming an inner spacer in the recessed spaces. The method further includes forming a sacrificial layer on the exposed surfaces of the vertical fin and the substrate. The method further includes forming a protective liner on the sacrificial layer and inner spacers, and removing the portion of the sacrificial layer on the surface of the substrate to leave a hanging portion of the protective liner extending below the inner spacer.
INTERNATIONAL BUSINESS MACHINES CORPORATION
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Juntao Tenko Kangguo Xin Chen
Li Yamashita Cheng Miao Zhang