J.C. Patents
Wafer and test method thereof
A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
Himax Technologies Limited
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inventional additional additional
Tzong-Yau Ying-Lieh Chien-Ru Lin-Kai Chin-Tien
Ku Chen Chen Bu Chang