F. Chau & Associates, LLC.
Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer
Exemplary embodiments of the invention generally include methods for forming multilayer metal interconnect structures using dual damascene methods that incorporate a via capping process to protect lower interconnection lines from etching damage or oxidation, for example, that may be caused by inadvertent exposure of lower interconnection lines to etching atmospheres.
Samsung Electronics Co., Ltd.
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Jae Hak Sun Jung Seung Jin
Kim Lee Lee