Patterson & Sheridan, LLP
Semiconductor device and manufacturing method of semiconductor device
A through electrode and a multilayer wiring are provided on a semiconductor substrate, and a bottom layer connection wiring, a lower layer connection wiring, an upper layer connection wiring, and a top layer connection wiring are provided in the multilayer wiring. The through electrode is connected to the bottom layer connection wiring, and a via is arranged at a position other than a position immediately above the through electrode.
TOSHIBA MEMORY CORPORATION
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Toshihiro Shinya
Nambu Watanabe