Schwabe, Williamson & Wyatt P.C.
High mobility nanowire fin channel on silicon substrate formed using sacrificial sub-fin
An integrated circuit die includes a quad-gate device nanowire of channel material for a transistor (e.g., single material or stack to be a channel of a MOS device) formed by removing a portion of a sub-fin material from below the channel material, where the sub-fin material was grown in an aspect ration trapping (ART) trench. In some cases, in the formation of such nanowires, it is possible to remove the defective fin material or area under the channel. Such removal isolates the fin channel, removes the fin defects and leakage paths, and forms the nanowire of channel material having four exposed surfaces upon which gate material may be formed.
Intel Corporation
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Chandra S. Tahir Anand S. Gilbert Sanaz K. Matthew V. Jack T. Marko Glenn A. Willy
Mohapatra Ghani Murthy Dewey Gardner Metz Kavalieros Radosavljevic Glass Rachmady