Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells
Improved processes for manufacturing wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes. Such processes may involve evaluating Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
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Timothy Stephen Christopher Larg Sheng-Che Tomasz Markus Kimon John Sherry Conor Rakesh Dennis Nobuharu Andrzej Hideki Jeremy Kelvin Carl Marci Indranil Hans Jonathan Marcin Vyacheslav Simone
Fiscus Lam Hess Weiland Lin Brozek Rauscher Michaels Kibarian Lee O'Sullivan Vallishayee Ciplickas Yokoyama Strojwas Matsuhashi Cheng Doong Taylor Liao De Eisenmann Haigh Strojwas Rovner Comensoli