Myers Bigel Sibley & Sajovec
Semiconductor memory devices in which the number of memory banks to be refreshed may be changed and methods of operating the same
A semiconductor memory device includes a plurality of memory banks. A refresh control block is responsive to a control address that identifies at least one of the plurality of memory banks to be refreshed. The refresh control block is configured to control refreshing of the at least one of the plurality of memory banks to be refreshed. The control address is used during read and/or write operations of the plurality of memory banks.
Samsung Electronics Co., Ltd.
G G
G11C G11C
inventional inventional
Yun-sang Sung-ho
Lee Choi