Heslin Rothenberg Farley & Mesiti P.C.
Methods for forming FinFETs with reduced series resistance
A method for forming FinFETs with reduced series resistance includes providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate, a gate disposed over a first portion of the fin, and a first sidewall spacer disposed over the fin and adjacent to the gate, increasing epitaxially the thickness of a second portion of the fin disposed outside the gate and the first sidewall spacer, and forming a second sidewall spacer disposed over the second portion of the fin and adjacent to the first sidewall spacer. A thickness of the second portion of the fin disposed under the second spacer is equal to or greater than a thickness of the first portion of the fin disposed under the gate.
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inventional inventional inventional
Changyong Manfred Jie Wanxun Xusheng
Xiao Eller Chen He Wu