Lowe Hauptman Ham & Berner, LLP
Method of generating an intellectual property block design kit, method of generating an integrated circuit design, and simulation system for the integrated circuit design
The present application discloses a method of generating an intellectual property (IP) block design kit including an IP block circuit design and a system-level characteristics table for manufacturing an integrated circuit. According at least one embodiment, the IP block circuit design is generated. The IP block circuit design is simulated based on predetermined configuration sets, and each configuration set has manufacturing options and/or operating conditions. A plurality of system-level models for the predetermined configuration sets are generated based on the simulation of the IP block circuit design. The system-level characteristics table is generated by arranging the predetermined configuration sets and the system-level models in compliance with a system-level characteristics table template of a system-level characteristics modeling device. Then the IP block circuit design and the system-level characteristics table are stored as the IP block design kit.
Taiwan Semiconductor Maufacturing Company, Ltd.
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additional additional inventional inventional
Shi-Hung Tan-Li Wei-Li Yun-Han Kheng-Guan Lee-Chung
Wang Chou Chen Lee Tan Lu