McClure, Qualey & Rodack, LLP
Integrated circuit and fabrication method thereof
A method for fabricating an integrated circuit is provided. The method includes depositing a first polish stop layer above a memory device, in which the first polish stop layer has a first portion over the memory device and a second portion that is not over the memory device; removing the second portion of the first polish stop layer; depositing an inter-layer dielectric layer over the first polish stop layer after removing the second portion of the first polish stop layer; and polishing the inter-layer dielectric layer until reaching the first portion of the first polish stop layer.
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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Sin-Yi Chang-Sheng Chen-Jung Tai-Yen Jyu-Horng Chien-Chung Han-Ting Yu-Shu Chih-Yuan
Yang Lin Wang Peng Shieh Huang Lin Chen Ting