Muir Patent Law, PLLC
Semiconductor memory cell array having fast array area and semiconductor memory including the same
A semiconductor memory cell array is provided which includes a first memory cell array area including first group memory cells arranged in a chip in a matrix of rows and columns and having a first operating speed; and a second memory cell array area including second group memory cells arranged in the chip in a matrix of rows and columns and having a second operating speed different from the first operating speed. The first and second memory cell array areas are accessed by addressing of a DRAM controller.
SAMSUNG ELECTRONICS CO., LTD.
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Joosun Haksoo Dae-Hyun Chulwoo Uksong Hyojin
Choi Yu Kim Park Kang Choi