Volpe and Koenig PC
Memory circuit with high reading speed and low switching noise
A memory circuit with relatively high reading speed and relatively low switching noise is provided. The memory circuit includes an output buffer device having a first input receiving a data signal having a first voltage level, a second input receiving a pre-set voltage having a second voltage level and an output outputting the data signal, and a pre-set circuit constructed by a pair of MOSFETs and providing the pre-set voltage to the second input before the output buffer device receives the data signal. The pre-set circuit receives a control signal activating the pair of MOSFETs at the same time, and when the output buffer device receives the data signal, a voltage level of the second input is swung from the second level to the first voltage level.
Macronix International Co., Ltd.
G G G
G11C G11C G11C
inventional inventional inventional
Chia-Jung Yung-Hsu Chun-Yu Fu-Nian
Chen Chen Liao Liang