Roberts Mlotkowski Safran Cole & Calderon, P.C.
Scaled memory structures or other logic devices with middle of the line cuts
The present disclosure relates to semiconductor structures and, more particularly, to scaled memory structures with middle of the line cuts and methods of manufacture The structure comprises: a plurality of fin structures formed on a substrate; a plurality of gate structures spanning over adjacent fin structures; a cut in adjacent epitaxial source/drain regions; and a cut in contact material formed adjacent to the plurality of gate structures, which provides separate contacts.
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Jerome Hong Haiting Erik Zhenyu Wei Hui Scott Jae Gon
Ciavatti Yu Wang Geiss Hu Zhao Zang Beasor Lee