Antonelli, Terry, Stout & Kraus, LLP
Method of manufacturing semiconductor integrated circuit device having a capacitor
In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta2O5 (tantalum oxide) film 46, the portions of bit lines BL and first-layer interconnect lines 23 to 26 of a peripheral circuit which are in contact with at least an underlying silicon oxide film 28 are formed of a W film, the bit lines BL and the interconnect lines 23 to 26 being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines 23 to 26 and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.
Hitachi, Ltd.
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Tsuyoshi Masayuki Isamu Toshihiro Masayoshi Hideo Masayoshi Hidekazu Naoki Keizo Satoru Yoshitaka Takuya Yoshitaka
Tamaru Suzuki Asano Sekiguchi Saito Aoki Hirasawa Goto Fukuda Kawakita Yamada Tadaki Fukuda Nakamura