IP & T Group LLP
Memory device detecting and correcting data error and operating method thereof
A memory device includes an error correction code (ECC) block suitable for performing an ECC operation, and generating a flag signal when an error is detected and corrected through the ECC operation in data read from a memory cell array, and a refresh control block suitable for comparing an active row address with a target address in response to the flag signal, and refreshing data of a neighboring address of the target address based on a comparison result.
SK hynix Inc.
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Yun-Young Seok-Cheol Sang-Ho Seok-Bo
Lee Yoon Lee Shim