Rader, Fishman & Grauer
PLL circuit with reduced response variance due to manufacturing variations
 Variations in the response band of a PLL circuit due to manufacturing variations of the sensitivity of a voltage control oscillator are suppressed. With respect to an original PLL circuit which generates a clock signal having a predetermined frequency in accordance with an input signal, a dummy PLL circuit having a voltage control oscillator having characteristics substantially similar to those of a voltage control oscillator within the original PLL circuit is provided. By controlling the output current of a charge pump circuit within the original PLL circuit on the basis of a locked voltage of the voltage control oscillator within the dummy PLL circuit, the gain of the original PLL circuit is controlled. 
Sony Corporation
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Hidekazu
Kikuchi