Miles & Stockbridge P.C.
MISFET with capacitors
The present invention aims to enhance the reliability of a semiconductor device having first through fourth capacitive elements. The first through fourth capacitive elements are disposed over a semiconductor substrate. A series circuit of the first and second capacitive elements and a series circuit of the third and fourth capacitive elements are coupled in parallel between first and second potentials. Lower electrodes of the first and third capacitive elements are respectively formed by a common conductor pattern and coupled to the first potential. Lower electrodes of the second and fourth capacitive elements are respectively formed by a conductor pattern of the same layer as the above conductor pattern and coupled to the second potential. Upper electrodes of the first and second capacitive elements are respectively formed by a common conductor pattern and brought to a floating potential. Upper electrodes of the third and fourth capacitive elements are respectively formed by a conductor pattern of the same layer as the above conductor pattern and brought to a floating potential, but not coupled to the upper electrodes of the first and second capacitive elements by a conductor.
Renesas Electronics Corporation
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inventional inventional additional
Toshikazu Keiichi Satoshi Hisanori
Matsui Haraguchi Kamei Ito