JCIPRNET
Chip carrier and manufacturing method thereof
A chip carrier and a manufacturing method thereof are provided. The chip carrier includes a first structure layer and a second structure layer. The first structure layer has at least one opening and includes at least one first insulating layer. A thermal expansion coefficient of the first insulating layer is between 2 ppm/° C. and 5 ppm/° C. The second structure layer is disposed on the first structure layer and defines at least one cavity with the first structure layer. The second structure layer includes at least one second insulating layer, and a thermal expansion coefficient of the second insulating layer is equal to or greater than the thermal expansion coefficient of the first insulating layer.
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inventional inventional additional additional inventional inventional additional additional additional inventional additional additional
Chung W.
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