Grossman, Tucker, Perreault & Pfleger, PLLC
Register mapping techniques for efficient dynamic binary translation
Generally, the present disclosure provides a system and method for mapping registers from a system with more registers to a system with fewer registers. Regions may be formed that include one or more blocks of code with relatively frequent register accesses. The most frequently accessed source registers may be mapped to target registers. Each block in the region may be bounded by a prologue and at least one epilogue. The prologue may be configured to implement register mapping and the epilogue(s) may be configured to manage program flow from a block in the region to another block in the region or to a block not in the region.
Intel Corporation
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G06F G06F
inventional inventional
Wei Hong Guilherme D.
Li Wang Ottoni