Harness, Dickey & Pierce, P.L.C.
Three-dimensional semiconductor memory devices
A three-dimensional semiconductor memory device is provided. The device may include a first stack structure on a substrate including a cell array region and a connection region, a second stack structure on the first stack structure, a first vertical channel hole penetrating the first stack structure and partially exposing the substrate and a bottom surface of the second stack structure, on the cell array region, a second vertical channel hole penetrating the second stack structure and exposing the first vertical channel hole, on the cell array region, a bottom diameter of the second vertical channel hole being smaller than an top diameter of the first vertical channel hole, and a buffer pattern placed in the first vertical channel hole and adjacent to the bottom surface of the second stack structure.
Samsung Electronics Co., Ltd.
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Kyong-Won Youngjun Junggeun Bio Sookyeom Yujin Jaehyun
An Cheon Jee Kim Yong Kim Yang