Aquilino & Welsh
Boolean digital multiplier
 A boolean multiplier is disclosed. The boolean multiplier includes a plurality of input buffers for storing a first operand and a second operand. The multiplier also includes a first set of gates coupled to the input buffers, the first set of gates respectively combining the first operand and the second operand with Boolean function to produce logical products. The multiplier further includes a second set of gates coupled to the first set of gates, the second set of gates respectively combining the logical products with Boolean functions to produce specific product bits. 
G
G06F
inventional
James M.
Lewis