Locke Lord LLP
Clock switching apparatus and method
A clock switching apparatus is provided. The clock input terminal receives a first clock signal as an input clock signal at first and start to receive a second clock signal as the input clock signal during a masking state of a masking signal within a clock-switching time period. The enabling synchronizing circuit receives a clock-switching enabling signal, receives the input clock signal and generate a synchronized enabling signal accordingly. The masking circuit receives the synchronized enabling signal and the mask signal to generate a final enabling signal. The output circuit receives the input clock signal, receive the final enabling signal that disables the output circuit only when either the masking signal is at the masking state or the synchronized enabling signal is at the clock-switching enabling state, and generate an output clock signal according to the input clock signal when the output circuit is enabled.
REALTEK SEMICONDUCTOR CORPORATION
H G
H03K G06F
inventional inventional
Huan-Wen Po-Hsien Li-Yu
Chen Wu Chen