Glass and Associates
Clock recovery device with state machine controller
A clock recovery device recovers frequency and timing information from an incoming packet stream over asynchronous packet networks. A phase locked loop (PLL) block has predefined states and includes a type II PLL. One of the states involves type II PLL operation. A state machine controller for controls the transition between the predefined states in response to changes in the incoming packet stream. A controlled oscillator is responsive to the PLL block to generate an output signal.
MICROSEMI SEMICONDUCTOR ULC
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Tariq Robert Xihao
Haddad Friesen Li