Fernandez & Associates LLP
Method and a system for controlling a data sense amplifier for a memory chip
A memory chip having a system for controlling sensing time of a data sense amplifier (DSA). A global control is adapted for initiating data access to the memory blocks. A wire path coupling the global control to each memory block is utilized by each memory block as a part of transmitting path for receiving a block enable signal sent from the global control. Specifically, a memory block includes a wired-NOR circuit adapted to send a DSA enable signal to the DSA in response to being selected by a block enable signal. In contrast to a simple delay circuit that only controls the DSA roughly, this wired-NOR circuit tracks internal read signal, and controls the DSA tightly. The time from the activation of the block enable signal by the global control to the enabling of the DSA stays approximately the same irrespective of the memory block's location in the memory chip. Block location independence of DSA sensing time allows tighter memory cycle.
Silicon Access Technology, Inc.
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G11C G11C G11C
inventional inventional inventional
Ju-Han
Kim