Method for forming flash memory with high coupling ratio
First of all, a semiconductor substrate has the poly regions thereon. Then the souse/drain regions are formed in the semiconductor substrate by performing the ion-implant method. Next, the dielectric layers are formed on the souse/drain regions and between the poly regions. For increasing the coupling ratio of the flash memory, the photoresist layers, individually, are defined on the dielectric layers and the poly regions. Afterward, the dielectric layers are etched by performing an etched process and the photoresist layers as etched masks, wherein the dielectric layers have the swing-like surfaces with large surface area after the etched process is finished. The photoresist layers are then removed. A polysilicon layer is formed along swing-like surfaces of dielectric layers and the surfaces of the poly regions by conforming method, while the polysilicon layer is patterned to form the first gates. Then an ONO layer is formed along the surfaces of the first poly gates by conforming method. Finally, a polysilicon layer, again, is formed along the surfaces of dielectric layers and the surface of the ONO layer by conforming method, so as to be a second gate.
Macronix International Co., Ltd.
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Ching-Yu
Chang