IP & T Group, LLP
Memory device and operating method thereof
A memory device may include: a plurality of memory cells; at least one address storage unit; a fail detection unit suitable for comparing first and second read data that are read from at least one memory cell selected among the plurality of memory cells to detect a fail, and storing an address of the selected memory cell in the address storage unit when the fail is detected; and a refresh control unit suitable for refreshing the memory cell corresponding to the address stored in the address storage unit at a higher frequency than the other memory cells.
SK Hynix Inc.
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Jun-Gi Jae-Il Hee-Seong Tae-Kyun
Choi Kim Kim Kim