Thomas, Kayden, Horstemeyer & Risley
High fMAX deep submicron MOSFET
A method of forming a high fMAX deep submicron MOSFET, comprising the following steps of. A substrate having a MOSFET formed thereon is provided. The MOSFET having a source and a drain and including a silicide portion over a gate electrode. A first ILD layer is formed over the substrate and the MOSFET. The first ILD layer is planarized to expose the silicide portion over the gate electrode. A metal gate portion is formed over the planarized first ILD layer and over the silicide portion over the gate electrode. The metal gate portion having a width substantially greater than the width of the silicide portion over the gate electrode. A second ILD layer is formed over the metal gate portion and the first ILD layer. A first metal contact is formed through the second ILD layer contacting the metal gate portion, and a second metal contact is formed through the second and first ILD layers contacting the drain completing the formation of the high fMAX deep submicron MOSFET. Whereby the width of the metal gate portion reduces Rg and increases the fMAX of the high fMAX deep submicron MOSFET.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Chung-Long Chao-Chieh Shyh-Chyi
Chang Tsai Wong