Scully, Scott, Murphy & Presser, P.C.
Semiconductor heterostructure including a substantially relaxed, low defect density SiGe layer
A heterostructure is provided which includes a substantially relaxed SiGe layer present atop an insulating region that is located on a substrate. The substantially relaxed SiGe layer has a thickness of from about 2000 nm or less, a measured lattice relaxation of from about 50 to about 80% and a defect density of less than about 108 defects/cm2. A strained epitaxial Si layer is located atop the substantially relaxed SiGe layer and at least one alternating stack including a bottom relaxed SiGe layer and an top strained Si layer located on the strained epitaxial Si layer.
International Business Machines Corporation
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Y10T Y10S H01L
additional additional inventional
Devendra K. Huajie Anthony G. Keith E. Stephen W.
Sadana Chen Domenicucci Fogel Bedell