Multi-threaded deterministic router
A method is described that includes: determining that nets of the circuit design comprise overlap, where the overlap indicates that at least two of the nets of the circuit design use a same routing resource; dividing the nets with overlap among a plurality of buckets, where for each bucket, a net of the bucket does not overlap any other net in the bucket; sequentially processing each bucket by unrouting and rerouting, via at least one processor, nets in the bucket; and storing routing information specifying routes for nets of the circuit design.
Xilinx, Inc.
G G
G06F G06F
inventional additional
Christopher H. Satyaki Sandor S. Taneem Jason H. Vinay Sanjeev Gitu
Kingsley Das Kalman Ahmed Anderson Verma Kwatra Jain