Haynes and Boone, LLP
Flip chip packaging
An integrated circuit (IC) package includes a first substrate; a second substrate disposed over the first substrate; a plurality of connectors disposed between the first and second substrates such to electrically couple the first and second substrate; a constraint layer disposed over the first and second substrates such that a cavity is formed between the constraint layer and the first substrate; and a molding material disposed within the cavity and extending through the constraint layer. The constraint layer has a top surface and an opposing bottom surface and the molding material extends from the top surface to the bottom surface of the constraint layer.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Chien-Kuo Jing Ruei Yu-Chih Chih-Hao Chi-Yang
Chang Lu Liu Lin Yu