Fenwick & West LLP
Method and system for improving serial port memory communication latency and reliability
A method, apparatus and system for reducing memory latency is disclosed. In one embodiment, data between a host computer system and a memory is communicated via a port or a group of ports at the memory over multiple time intervals, wherein the host computer is coupled to the memory. Further, a command associated with the data is communicated between the host computer system and the memory via the port or the group of ports over a single time interval.
Silicon Image, Inc.
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Dongyun Alan Daeyun Anu Sungjoon Seung-jong Hyung Rok
Lee Ruberg Shim Murthy Kim Lee Lee