WPAT, PC
Shift register circuit and gate driver
A shift register circuit and a gate driver including the shift register circuit. The shift register circuit includes an input circuit, a drive circuit, a pull-down circuit, a regulator circuit and a pull-up circuit. The input circuit is configured to receive a first clock signal and is coupled to the first node. The driving circuit is configured to receive the first clock signal and a second clock signal. The input circuit is coupled to the first node. The pull-down circuit is configured to receive the voltage of the first node. The pull-down circuit is coupled to the first node and an output terminal. The pull-down circuit outputs the first voltage to the output terminal in response to the voltage of the first node.
AU OPTRONICS CORPORATION
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Ching-Sheng Po-Cheng Chih-Lung Cheng-Han Mao-Hsun Yung-Chih
Cheng Lai Lin Huang Cheng Chen