Ropes & Gray LLP
Low-power transceiver architectures for programmable logic integrated circuit devices
High-speed serial interface or transceiver circuitry on a programmable logic device integrated circuit (“PLD”) includes features that permit the PLD to satisfy a wide range of possible user needs or applications. This range includes both high-performance applications and applications in which reduced power consumption by the PLD is important. In the latter case, any one or more of various features can be used to help reduce power consumption.
Altera Corporation
H H
H03K H03K
inventional inventional
Richard G. Thungoc M. Tim Tri Sergey Wilson
Cliff Tran Hoang Shumarayev Wong