Clock signal regeneration circuitry
A method and circuit for regenerating clock signals. The method and circuit convert clock signals having either single- ended clock pulses or differential clock pulses into clock signals having substantially the same voltage swing. In one embodiment, the single-ended clock pulses are provided by a TTL logic circuit and the differential clock pulses are produced by a PECL logic circuit.
EMC Corporation
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H03K H03K G06F H04L
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Jinhua Marlon
Chen Ramroopsingh