Haynes and Boone, LLP
Structure and method for E-beam in-chip overlay mark
The present disclosure provides an integrated circuit structure that includes a semiconductor substrate having a first region and a second region having an area less than about 10 micron×10 micron; a first material layer over the semiconductor substrate and patterned to have a first circuit feature in the first region and a first mark in the second region; and a second material layer over the first material layer and patterned to have a second circuit feature in the first region and a second mark in the second region. The first mark includes first mark features oriented in a first direction, and second mark features oriented in a second direction perpendicular to the first direction. The second mark includes third mark features oriented in the first direction, and fourth mark features oriented in the second direction.
Taiwan Semiconductor Manufacturing Company, Ltd.
H G
H01L G03F
inventional inventional
Dong-Hsu Chih-Chung Yung-Hsiang Ming-Ho Jyun-Hong
Cheng Huang Chen Tsai Chen