Foley & Lardner
Semiconductor integrated circuit device with MOS transistor and MOS capacitor and method for manufacturing the same
A method for fabricating a semiconductor device using an etching stopper film without increasing a number of steps of photoetching and without degrading the device characteristics. A MOS capacitor having a small coefficient of voltage is formed by forming a thick oxide film which is different from a gate oxide film of a MOS transistor to be formed on the same substrate and by implanting impurity of an amount which will not destroy insulation right under the oxide film. At this time, the electrode of the MOS capacitor is formed by the same layer with that of the gate electrode of the MOS transistor to equalize the height of both the electrodes.
Kabushiki Kaisha Toshiba
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inventional inventional inventional
Kenji Yasushi
Yoshida Ito