J.C. Patents
Isolation structure of semiconductor device and method for fabricating the same
An isolation structure is disposed between fin field effect transistors of a magnetic random access memory (MRAM) device. The isolation structure includes a fin line substrate, having a trench crossing the fin line substrate. An oxide layer is disposed on the fin line substrate other than the trench. A liner layer is disposed on an indent surface of the trench. A nitride layer is disposed on the liner layer, partially filling the trench. An oxide residue is disposed on the nitride layer within the trench at a bottom portion of the trench. A gate-like structure is disposed on the oxide layer and also fully filling the trench.
United Microelectronics Corp.
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Hung-Yueh Yu-Ping Yu-Ruei Chung-Liang
Chen Wang Chen Chu