Fliesler, Dubb, Meyer & Lovejoy LLP
Triple-well EEPROM cell using P-well for tunneling across a channel
 A triple-well EEPROM cell is described that is programmed and erased by electron tunneling across an entire portion of separate transistor channels. The EEPROM cell has three transistors formed in a semiconductor substrate. The three transistors are a tunneling transistor (NMOS), a sense transistor (NMOS) and a read transistor (NMOS). The tunneling transistor is formed in a second well (e.g a P conductivity type well) that is separated from the substrate by a first well, having e.g. an N conductivity type. a first well formed in the substrate. Electron tunneling occurs to program the EEPROM cell through a sense tunnel oxide layer upon incurrence of a sufficient voltage potential between a floating gate and the sense channel. Electron tunneling also occurs to erase the EEPROM cell through a tunnel oxide layer upon incurrence of a sufficient voltage potential between the floating gate and the tunneling channel. 
Vantis Corporation
G H H H
G11C H01L H01L H01L
inventional inventional inventional inventional
Sunil D. Xiao-Yu
Mehta Li