Structure and method for making strained channel field effect transistor using sacrificial spacer
A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said gate stack, and a pair of regions consisting essentially of a single-crystal semiconductor alloy which are disposed on opposite sides of the gate stack. Each of the semiconductor alloy regions is spaced a first distance from the gate stack. The source region and drain region of the FET are at least partly disposed in respective ones of the semiconductor alloy regions, such that the source region and the drain region are each spaced a second distance from the gate stack by a first spacer of the pair of first spacers, the second distance being different from the first distance.
Kabushiki Kaisha Toshiba International Business Machines Corporation
H H H H H H H H H H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L
additional additional inventional inventional additional additional additional inventional additional inventional additional additional inventional additional inventional inventional
Henry K. Dureseti Tsutomu Siddhartha Huajie Sang-Hyun Werner A.
Utomo Chidambarrao Sato Panda Chen Oh Rausch