Programming environment for heterogeneous processor resource integration
Compiling a source code program for a heterogeneous multi-core processor having a first instruction sequencer, having a first instruction set architecture, an accelerator to the first instruction sequencer, wherein the accelerator comprises a heterogeneous resource with respect to the first instruction sequencer having a second instruction set architecture, the source code program having specified therein a region of source code for the first instruction set architecture of the processor and a region of source code for the second instruction set architecture of the processor.
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Gautham Perry Guei-Yuan Hong Jamison Xinmin Hong
Chinya Wang Lueh Wang Collins Tian Jiang