Thompson Hine LLP
Passive devices for FinFET integrated circuit technologies
Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.
GLOBALFOUNDRIES INC.
H H H H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L
additional inventional inventional inventional additional inventional inventional inventional inventional inventional
William F. Robert J. Theodorus E. Junjun Thomas A. Terence B.
Clark, Jr. Gauthier, Jr. Standaert Li Wallner Hook