Eschweiler & Associates, LLC
STI punch-through defects and stress reduction by high temperature oxide reflow process
 A method of manufacturing a semiconductor device with reduced shallow trench isolation defects and stress is disclosed. The disclosed method begins by providing a silicon substrate including a capping layer. A plurality of isolation trenches are then etched through the capping layer and into the silicon substrate to form a plurality of isolation regions in the silicon substrate. The isolation trenches are then filled with an oxide layer. The oxide layer and the capping layer are then polished back using techniques known in the art. After polishing, the semiconductor device is annealed between a temperature range of about 1150.degree. C. to about 1200.degree. C. 
Advanced Micro Devices, Inc.
H
H01L
inventional
Ting Y. Xiao-Yu Sunil D. Robert H.
Tsui Li Mehta Tu