Eschweiler & Potashnik, LLC
Top electrode for device structures in interconnect
Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Wen-Chun Kuo-Chi Chih-Yang Chin-Chieh Sheng-Hung Hsia-Wei Yu-Wen Wen-Ting
You Tu Chang Yang Shih Chen Liao Chu