Erase method to improve flash EEPROM endurance by combining high voltage source erase and negative gate erase
 A method to erase data from a flash EEPROM is disclosed. Electrical charges trapped in the tunneling oxide of a flash EEPROM are eliminated to maintain proper separation of the programmed threshold voltage and the erased threshold voltage after extended programming and erasing cycles. The method to erase a flash EEPROM cell begins by erasing the flash EEPROM cell by first applying a high positive voltage pulse to the source of the EEPROM cell. Simultaneously, a ground reference potential is applied to the semiconductor substrate and the control gate. At this same time the drain is floating. Floating the source and drain and applying the ground reference potential to the semiconductor substrate then detraps the flash EEPROM cell. At the same time, a relatively large negative voltage pulse is applied to the control gate. 
Taiwan Semiconductor Manufacturing Company
G
G11C
inventional
Kuo-Reay Ming-Chou Jian-Hsing Juang-Ke
Peng Ho Lee Yeh