Modified method for forming cylinder-shaped capacitors for dynamic random access memory (DRAM)
 A modified method for forming cylinder-shaped stacked capacitors for DRAMs which circumvents oxide erosion due to misalignment is described. A planar silicon oxide (SiO.sub.2) first insulating layer is formed over device areas. A silicon nitride (Si.sub.3 N.sub.4) etch-stop layer is deposited and first openings are etched for capacitor node contacts. A polysilicon layer is deposited and etched back to form node contacts in the first openings. A Si.sub.3 N.sub.4 second etch-stop layer is deposited and etched back to form protective sidewall spacers in the first openings when the polysilicon node contact is inadvertently overetched. A second SiO.sub.2 insulating layer is deposited and second openings for bottom electrodes are etched over the node contacts. A conformal second polysilicon layer is deposited and chemically/mechanically polished back to form the bottom electrodes in the second openings. The second insulating layer is removed by wet etching to the first etch-stop layer. When the second openings are misaligned over the node contact openings, the Si.sub.3 N.sub.4 sidewall spacers protect the SiO.sub.2 first insulating layer from being eroded over the devices on the substrate. The capacitors are now completed by forming an interelectrode dielectric layer on the bottom electrodes, and depositing and patterning a third polysilicon layer for top electrodes. 
Taiwan Semiconductor Manufacturing Company
H H
H01L H01L
inventional inventional
Yu-Hua James
Lee Wu