IP & T Group LLP
Memory controller
A controller that controls a memory device including a plurality of pages each corresponding to a physical address, the controller may include: a memory suitable for storing a plurality of logical-to-physical (L2P) chunks each indicating mapping between one or more logical addresses and one or more physical addresses and an original valid page bitmap (VPB) indicating whether each of the plurality of pages is a valid page that stores valid data; and a processor suitable for generating a reconstructed VPB based on normal L2P chunks when an corrupted L2P chunk is detected, detecting pages having different states in the original VPB and the reconstructed VPB, obtaining logical addresses mapped to physical addresses of the detected pages, respectively, and recovering the corrupted L2P chunk based on the physical addresses of the detected pages and the obtained logical addresses.
SK hynix Inc.
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Do Hun Ju Hyun Jin Yeong
Kim Kim Kim