Sughrue Mion, PLLC
Three-dimensional semiconductor devices including vertical structures
A three-dimensional semiconductor device is provided including a gate electrode disposed on a substrate and having a pad region, a cell vertical structure passing through the gate electrode, a dummy vertical structure passing through the pad region, and a gate contact plug disposed on the pad region. The cell vertical structure includes a cell pad layer disposed on a level higher than that of the gate electrode and a cell channel layer opposing the gate electrode, the dummy vertical structure includes a buffer region formed of a material different from that of the cell pad layer and a dummy channel layer formed of a material the same as that of the cell channel layer, and at least a portion of the buffer region is located on the same plane as at least a portion of the cell pad layer.
SAMSUNG ELECTRONICS CO., LTD.
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G11C H01L H01L H01L H01L G11C H01L G11C H01L H01L
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Young Jin
Jung