Oblon, Fisher, Spivak, McClelland & Maier
Semiconductor memory device using resonant-tunneling hot electron transistor
 A semiconductor memory device comprises an address line, a write line, a read line, and a memory cell connected to the address, write and read lines, where the memory cell comprises a power source, an RHET, a switching element and a data transfer element. The power source is coupled to a base of the RHET through a first resistor so that the RHET has a plurality of stable states. The switching element is coupled between the write line and the base of the RHET, and is controlled by a signal from the address line. The data transfer element is coupled between a collector of the RHET and the read line, and the collector is coupled to the power source through a second resistor. When reading an information from the memory cell, a signal corresponding to one of the plurality of stable states of the RHET is transmitted to the read line via the data transfer element. 
Director-General, Agency of Industrial Science and Technology
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Toshihiko
Mori