William Parker & Associates Ltd.
Repair circuit, memory apparatus using the same and operating method thereof
A memory apparatus includes a first memory bank, a second memory bank, a row decoder and repair circuit, and an input/output driver controller. The row decoder and repair circuit is coupled to the first and second memory banks in common. The row decoder and repair circuit generates a shared repair signal according to whether a word line disposed in a first memory bank is replaced with a word line disposed in a second memory bank. The input/output driver controller allows read or write operations for one of the first and second memory banks to be performed based on the shared repair signal and an operation signal.
SK hynix Inc.
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Jun Gi Min Chul Yong Seop Ji Hyae
Choi Shin Kim Bae