Knobbe, Martens, Olson & Bear LLP
Information processing apparatus and error correction method
According to one embodiment, a memory interface module is configured to read one of instructions stored in a memory in accordance with a memory address designated by a fetch request issued from a processor. An error detection module is configured to detect an error in the read instruction. An instruction transmission module is configured to send to the processor, upon detection of an error in the read instruction, a first instruction to hold on a stack the same memory address as the one designated by the fetch request and a second instruction to jump to an error correction routine for correcting an error of the read instruction.
Kabushiki Kaisha Toshiba
G
G06F
inventional
Kenji
Yoshida