Fish & Richardson P.C.
Semiconductor device with stacked structure of memory cells over sensing amplifiers, circuit board and electronic device
A semiconductor device with low power consumption or a semiconductor device with a reduced area is provided. The semiconductor device includes a cell array including a first memory cell and a second memory cell; and a sense amplifier circuit including a first sense amplifier and a second sense amplifier. The cell array is over the sense amplifier circuit. The first sense amplifier is electrically connected to the first memory cell through a first wiring BL. The second sense amplifier is electrically connected to the second memory cell through a second wiring BL. The first sense amplifier and the second sense amplifier are electrically connected to a wiring GBL. The sense amplifier circuit is configured to select one of a potential of the first wiring BL and a potential of the second wiring BL and output the selected potential to the wiring GBL.
Semiconductor Energy Laboratory Co., Ltd.
G G G H G G G H
G11C G11C G11C H01L G11C G11C G11C H01L
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Tatsuya Kiyoshi Takahiko Wataru
Onuki Kato Ishizu Uesugi