Eschweiler & Potashnik, LLC
Package and method for integration of heterogeneous integrated circuits
In some embodiments, the present disclosure relates to a package for holding a plurality of integrated circuits. The package includes a first conductive pad over a first chip and a second conductive pad over a second chip. A molding structure surrounds the first chip and the second chip. A first passivation layer is over the first chip and the second chip, and a conductive structure is over the first passivation layer. The conductive structure is coupled to the first conductive pad. A second passivation layer is over the conductive structure. The first passivation layer and the second passivation layer have sidewalls defining an aperture that is directly over an optical element within the second chip and that extends through the first passivation layer and the second passivation layer.
Taiwan Semiconductor Manufacturing Co., Ltd.
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inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional additional additional inventional additional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional additional inventional additional inventional inventional
Wan-Yu Jui Hsieh Tien-Yu Kuo-Chung Ying-Hao Chun-Hao
Lee Lai Huang Yee Kuo Tseng