Cushman, Darby & Cushman
Series logic circuit arrangement using a plurality of complementary IGFET's
 A series logic circuit arrangement using a plurality of complementary IGFET's and comprising a plurality of series connected logic circuits, each of the logic circuits being designed to effect a predetermined logic function with respect to input binary coded signals by using at least one P channel IGFET and one N channel IFGET. In the negative logic system, the P channel IGFET's are arranged on a semiconductor substrate according to a logic equation of minterm-type expression, and the N channel IGFET's are arranged on the substrate according to a logic equation of maxterm-type expression, and, in the positive logic system, the N channel IGFET's are provided on the substrate according to the logic equation of minterm-type expression, and the P channel IGFET's are disposed on the substrate according to the logic equation of maxterm-type expression, thereby admitting of integrating the P and N channel IGFET's on the substrate within a smallest possible area. 
Tokyo Shibaura Electric Co., Ltd.
H H H
H03K H03K H01L
inventional inventional inventional
Yasoji Kenshi
Suzuki Manabe