Choate, Hall & Stewart
Buffer circuit block and design method of semiconductor integrated circuit by using the same
In an LSI design method, a delay adjusting block group including a plurality of buffer circuit blocks which have different delay amounts but which are the same in connection to the external shape and the external size of the block, the input terminal position and the output terminal position, the input terminal capacitance and the driving capability of the output part including the load dependency, is previously prepared and registered into a circuit library. One buffer circuit block selected from the delay adjusting block group is inserted into a signal path in question, and the delay amount of the signal path in question is roughly adjusted by an existing delay amount adjusting method without replacing the selected buffer circuit block, and thereafter, the delay amount of the signal path in question is roughly adjusted by replacing the selected buffer circuit block by another buffer circuit block included in the delay adjusting block group but having a different delay amount. Thus, a highly precise delay amount adjustment can be attained easily for a shortened time.
NEC Electronics Corporation
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inventional inventional inventional inventional
Toru
Fujii