Lowe Hauptman & Ham, LLP
System and methods for converting planar design to FinFET design
A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated.
Taiwan Semiconductor Manufacturing Company, Ltd.
G H H
G06F H01L H01L
additional inventional inventional
Hsiao-Hui Clement Hsingjen Shu-Yu Cheok-Kei Yi-Tang Chih-Sheng Chien-Wen Yu-Ning
Chen Wann Chen Lei Lin Chang Chen Chang