Process for making semiconductor dies, chips and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on test wafers that include multiple means/steps for enabling NC detection of AACNT-TS via opens
Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of AACNT-TS via opens.
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Simone Hideki Dennis Andrzej Kelvin Rakesh Vyacheslav Conor Larg Hans Indranil Jeremy Timothy Kimon Sherry Carl Marcin Tomasz Markus Marci Stephen Nobuharu Sheng-Che Jonathan Christopher John
Comensoli Matsuhashi Ciplickas Strojwas Doong Vallishayee Rovner O'Sullivan Weiland Eisenmann De Cheng Fiscus Michaels Lee Taylor Strojwas Brozek Rauscher Liao Lam Yokoyama Lin Haigh Hess Kibarian