Myers Bigel Sibley & Sajovec, P.A.
Semiconductor memory devices
In some embodiments, a semiconductor memory device includes a substrate that includes a cell array region and a peripheral circuit region. The semiconductor memory device further includes a device isolation pattern on the substrate. The device isolation pattern defines a first active region and a second active region within the cell array region and a third active region in the peripheral circuit region. The semiconductor memory device further includes a first common source region, a plurality of first source/drain regions, and a first drain region in the first active region. The semiconductor memory device further includes a second common source region, a plurality of second source/drain regions, and a second drain region in the second active region. The semiconductor memory device further includes a third source/drain region in the third active region. The semiconductor memory device further includes a common source line contacting the first and second common source regions.
Samsung Electronics Co., Ltd.
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inventional inventional additional inventional
Hee-Soo Jung-Dal Dong-uk Choong-Ho Jong-Sun Ju-Hyuck
Kang Choi Choi Lee Sel Chung