IP & T Group LLP
Memory device and method of refreshing the same
A memory device includes a plurality of memory cells; a nonvolatile memory block suitable for simultaneously sensing one or more programmed weak addresses, and sequentially transmitting the sensed weak addresses; a weak address control block suitable for latching the weak addresses transmitted from the nonvolatile memory block, and outputting sequentially the latched weak addresses in a weak refresh operation; and a refresh control block suitable for controlling the memory cells corresponding to the counting address to be refreshed, in a normal refresh operation, and controlling the memory cells corresponding to the weak address to be refreshed, in the weak refresh operation.
SK Hynix Inc.
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inventional additional inventional inventional inventional
Jun-Gi Hee-Seong Youk-Hee Jae-Il Jong-Sam
Choi Kim Kim Kim Kim