Sterne, Kessler, Goldstein & Fox P.L.L.C.
Structure and method for testing three-dimensional memory device
Embodiments of structures and methods for testing three-dimensional (3D) memory devices are disclosed. In one example, a 3D memory device includes a memory array structure, a peripheral device structure, and an interconnect layer in contact with a front side of the memory array structure and a front side of the peripheral device structure, and a conductive pad at a back side of the memory array structure and that overlaps the memory array structure. The memory array structure includes a memory array stack, a through array contact (TAC) extending vertically through at least part of the memory array stack, and a memory array contact. The peripheral device structure includes a test circuit. The interconnect layer includes an interconnect structure. The conductive pad, the TAC, the interconnect structure, and at least one of the test circuit and the memory array contact are electrically connected.
Yangtze Memory Technologies Co., Ltd.
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Steve Weiyi Feng Lidong Simon Shi-Ning Youn Cheul Jong Seuk Jong Jun Zhenyu Yongna
Yang Pan Song Yang Kim Lee Kim Lu Li