Webster & Elliot LLP
Digital signal processor having instruction set with a logarithm function using reduced look-up table
A digital signal processor is provided having an instruction set with a logarithm function that uses a reduced look-up table. The disclosed digital signal processor evaluates a logarithm function for an input value, x, by decomposing the input value, x, to a first part, N, a second part, q, and a remaining part, r, wherein the first part, N, is identified by a position of a most significant bit of the input value, x, and the second part, q, is comprised of a number of bits following the most significant bit, wherein the number is small relative to a number of bits in the input value, x; obtaining a valuefrom a first look-up table based on the second part, q; computing an epsilon term, ε, using the expressionevaluating an expression Log2 (1+ε) using a polynomial approximation, such as a cubic approximation; and determining the logarithm function for the input value, x, by summing the values of N,and Log2(1+ε).
Intel Corporation
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inventional additional additional inventional
Jian-Guo Kameran Samer Joseph
Chen Azadet Hijazi Williams