IP & T Group LLP
Method for fabricating semiconductor device with recess gate
A semiconductor device includes a substrate with a recess pattern, a gate electrode filling the recess pattern, a threshold voltage adjusting layer formed in the substrate under the recess pattern, a source/drain region formed in the substrate on both sides of the gate electrode and a gate insulation layer, with the recess pattern being disposed between the gate electrode and the substrate, wherein the thickness of the gate insulation layer formed in a region adjacent to the source/drain region is greater than the thickness of the gate insulation layer formed in a region adjacent to the threshold voltage adjusting layer.
Hynix Semiconductor Inc.
H H H H H H
H01L H01L H01L H01L H01L H01L
inventional inventional inventional inventional inventional inventional
Jin-Yul Tae-Kyun Seung-Mi Yun-Hyuck
Lee Kim Lee Ji