IP & T Group LLP
Semiconductor device including input/output pad
A memory device includes a data pad disposed in a first pad area and configured to receive data, a data strobe pad disposed in the first pad area and configured to receive a data strobe signal, a clock pad disposed in a second pad area adjacent to the first pad area and configured to receive a clock signal, a data conversion circuit disposed in the first pad area and configured to convert the data inputted through the data pad into parallel data based on the data strobe signal, and a data driving circuit disposed in the first pad area and configured to transmit the parallel data through a global input and output line based on the clock signal.
SK hynix Inc.
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Ju Hyuck Seong Ju
Kim Lee