Vierra Magen Marcus LLP
Die memory operation scheduling plan for power control in an integrated memory assembly
Power regulation in an integrated memory assembly having control semiconductor dies and memory semiconductor is disclosed herein. A master control die regulates power usage by the integrated memory assembly. Each control die reports information about its expected power usage to the master control die. The master control die determines a plan that meets a power criterion for the integrated memory assembly. The plan may maximize the power usage in each time period, while staying within a power budget. The plan can include selecting which of the memory dies perform a memory operation (or phase of a memory operation) during a given time period. The master control die may send a die scheduling plan to each of the other control dies. Each die scheduling plan indicates when memory operations and/or phases of memory operations are to be performed.
Western Digital Technologies, Inc.
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Alexander Idan Eran
Bazarsky Alrod Sharon