Haynes and Boone, LLP
Method for integrated circuit patterning
An exemplary method includes forming a hard mask layer over an integrated circuit layer and implanting ions into a first portion of the hard mask layer without implanting ions into a second portion of the hard mask layer. An etching characteristic of the first portion is different than an etching characteristic of the second portion. After the implanting, the method includes annealing the hard mask layer. After the annealing, the method includes selectively etching the second portion of the hard mask layer, thereby forming an etching mask from the first portion of the hard mask layer. The method can further include using the etching mask to pattern the integrated circuit layer.
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
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Po-Hsueh Min-Yann Hua Feng Yan-Tso Kuei-Shun Shih-Chi Tsung-Lin Yuan-Hsiang
Li Hsieh Chen Tsai Chen Fu Yang Lung