Pearne & Gordon LLP
Interface and apparatus for inspecting electrical characteristics of wafer
The wafer inspection interface 18 includes a probe card 20 having a multiple number of probes 25; a fixing ring 21 configured to hold the probe card 20; a chuck top 23 disposed to face the probe card 20 with a wafer W therebetween; an outer seal ring 24 provided to hermetically seal an outer space 27 surrounded by the fixing ring 21, the probe card 20 and the chuck top 23; an outer depressurization path 29 through which the outer space 27 is depressurized; an inner seal ring 26 provided to hermetically seal an inner space 28 surrounded by the probe card 20 and the wafer W; and an inner depressurization path 30 through which the inner space 28 is depressurized. Further, the inner space 28 may be surrounded by the outer space 27, and the wafer W is disposed within the inner space 28. 
TOKYO ELECTRON LIMITED
G G G
G01R G01R G01R
additional additional inventional
Hiroshi
Yamada