Foley & Lardner LLP
Isolated circuit formed during back end of line process
A semiconductor die is disclosed upon which is formed direct current (DC) isolated first and second circuits. The first circuit is configured for electrical connection to a first ground. The second circuit is configured for electrical connection to a second ground. The first and second grounds can be at different potentials. The first and second circuits were formed using front end of line (FEOL) and back end of line (BEOL) processes. The first circuit includes a plurality of first devices, such as transistors, which were formed during the FEOL process, and the second circuit includes only second devices, such as transistors, which were formed during the BEOL process.
Renesas Electronics America Inc.
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Kenji Shigeru Tetsuo Toshio
Yoshida Maeta Sato Kimura