Bayes PLLC
On-chip capacitors in three-dimensional semiconductor devices and methods for forming the same
Embodiments of three-dimensional (3D) semiconductor devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack, an isolation structure, and a plurality of capacitor contacts. The memory stack includes vertically interleaved conductive layers and first dielectric layers. The isolation structure extends vertically through at least part of the memory stack to electrically separate the conductive layers into gate electrodes in a core array region and capacitor electrodes in a dummy staircase region. The plurality of capacitor contacts are in contact with at least two of the capacitor electrodes in the dummy staircase region, respectively.
YANGTZE MEMORY TECHNOLOGIES CO., LTD.
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Lei Wei Liang
Xue Liu Chen