J.C. Patents
Thermally enhanced package structure
A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrate. Then, a prepreg and a heat dissipating metal layer are provided, and the heat dissipating metal layer is disposed on a first surface of the prepreg and a second surface of the prepreg faces toward the chip. Finally, the prepreg covers the chip by laminating the prepreg and the substrate.
ASE Electronics Inc. Advanced Semiconductor Engineering, Inc.
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Ming-Chiang Shin-Hua Tai-Yuan Ho-Ming Teck-Chong Yung-Cheng Jen-Chieh Jau-Shoung Chao-Yuan
Lee Chao Huang Tong Lee Huang Kao Chen Liu