Jianq Chyun IP Office
Multi-threaded memory operation using block write interruption after a number or threshold of pages have been written in order to service another request
A data access method for accessing a rewritable non-volatile memory module via a data bus through a first and a second thread module, and a memory controller and a memory storage apparatus using the same are provided. In the present method, an access executing right is assigned to the second thread module to write page data. Whether an access command to be executed by the first thread module is received is determined when the second thread module writes a predetermined amount of page data into a predetermined number of physical pages. The access executing right is assigned to the first thread module when the access command is received, so that the first thread module executes the access command in a foreground mode and the second thread module executes an ongoing task in a background mode. Thereby, timeout caused by delayed response of the first thread module is effectively avoided.
Phison Electronics Corp.
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Ching-Wen
Chang