Fully-buffered dual in-line memory module with fault correction
A memory system comprising a first memory, a control module, a test module, and a second memory. The first memory is configured to store pages of data to be tested. The control module is configured to store identifiers of the pages of data. The test module is configured to test the pages of data in the first memory. The second memory is configured to, while the pages of data stored in the first memory are being tested, store the identifiers of the pages of data and store the pages of data. The control module is further configured to, after the test module completes testing of the pages of data in the first memory, move the pages of data from the second memory to the first memory based on the identifiers of the pages of data.
Marvell World Trade Ltd.
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Saeed Sehat
Azimi Sutardja