Alston & Bird LLP
Method for manufacturing thin film transistor display array with dual-layer metal line
A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.
Industrial Technology Research Institute
H H
H01L H01L
inventional inventional
Yu-Cheng Hung-Tse
Chen Chen