Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
Semiconductor device
In a PMOS transistor, the source-drain region is divided into four parts along the gate width and has an arrangement of four independent source regions and an arrangement of four independent drain regions. A partial trench isolation insulating film is arranged in contact with the whole of the opposed surfaces between the four source regions in such a manner that the channel region formed under the gate electrode is divided across the channel length. A body-tied region containing N-type impurities relatively high in concentration is arranged in contact with the side surface of the source region opposite to the gate electrode, and the potential of the body region is fixed through the well region from the body-tied region.
Renesas Technology Corp.
H H H
H01L H01L H01L
inventional inventional inventional
Takashi Tetsuya
Ipposhi Watanabe