Procopio, Cory, Hargreaves & Savitch LLP
Shift register and driving method therefor, gate driver circuit, and display device
A shift register includes an output sub-circuit, a cascade sub-circuit and at least one additional output sub-circuit. The output sub-circuit is configured to transmit a first clock signal received at the first clock signal terminal to the output signal terminal under control of a potential at the pull-up node, so as to scan a gate line coupled to the output signal terminal. The cascade sub-circuit is configured to transmit a second clock signal received at the second clock signal terminal to the cascade node under the control of the potential at the pull-up node. Each additional output sub-circuit is configured to transmit a clock signal received at a corresponding clock signal terminal to a corresponding additional output signal terminal under control of a potential at the cascade node, so as to scan a gate line coupled to the corresponding additional output signal terminal.
HEFEI BOE JOINT TECHNOLOGY CO., LTD. BOE TECHNOLOGY GROUP CO., LTD.
Xuehuan Yongqian
Feng Li