Haynes and Boone, LLP
Contact resistance between via and conductive line
A method includes forming a first conductive feature on a substrate, forming a via that contacts the first conductive feature, the via comprising a conductive material, performing a Chemical Mechanical Polishing (CMP) process to a top surface of the via, depositing an Interlayer Dielectric (ILD) layer on the via, forming a trench within the ILD layer to expose the via, and filling the trench with a second conductive feature that contacts the via, the second conductive feature comprising a same material as the conductive material.
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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Yu-Ming Shih-Chuan Chia-Hao Chun-Yuan Tien-Lu Jia-Chuan
Lin Chiu Chang Chen Lin You