Marshall, Gerstein & Borun LLP
Register controlled delay locked loop having an acceleration mode
A register controlled delay locked loop having an acceleration mode corresponding to an increase of the operation speed of a memory device is used to improve accuracy. The register controlled delay locked loop includes a delay line, a delay model, a delay block, a first phase comparator, and a second phase comparator, a mode decision block, a shift register control block, and a shift register.
Hynix Semiconductor, Inc.
H H H H H
H03L H03L H03L H03L H03L
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Jong-Tae Seong-Hoon
Kwak Lee