Jiang Chyun IP Office
Mask ROM structure and manufacturing method thereof
A mask read-only-memory structure and its method of manufacture are provided. The structure includes a substrate, a buried bit line in the substrate and a patterned stack layer covering a portion of the upper surface of the substrate. The stack layer includes a first dielectric layer, a stopping layer and a second dielectric layer. A gate oxide layer covers a portion of the upper surface of the substrate. A word line runs across the buried bit line to form a plurality of coding cells. The memory cells having a stack layer thereon are at a logic state &#8220;0&#8221; while the memory cells having a gate oxide layer thereon are at a logic state &#8220;1&#8221;.
Macronix International Co., Ltd
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inventional inventional inventional
Ching-Yu
Chang