Ladas & Parry LLP
Stack semiconductor package and method for manufacturing the same
A stack semiconductor package includes a first insulation member having engagement projections and a second insulation member formed having engagement grooves into which the engagement projections are to be engaged. First conductive members are disposed in the first insulation member and have portions which are exposed on the engagement projections. Second conductive members are disposed in the second insulation member in such a way as to face the first conductive members and have portions which are exposed in the engagement grooves. A first semiconductor chip is disposed within the first insulation member and is electrically connected to the first conductive members. A second semiconductor chip is disposed in the second insulation member and is electrically connected to the second conductive members.
Hynix Semiconductor Inc.
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You Kyung Tae Min Byoung Do Yu Hwan Chul Keun Dae Woong Jae-hyun
Hwang Kang Lee Kim Yoon Lee Son