Harness, Dickey & Pierce, P.L.C.
Memory devices and memory packages
A memory device includes a plurality of receivers that each include a first input terminal coupled to one pin of a plurality of input/output pins. The memory devices further includes a transmitter having an output terminal coupled to the first input terminals of the plurality of receivers. The memory device further includes a control circuit configured to control the transmitter to output a particular test signal. The plurality of receivers are each configured to generate output data based on receiving the particular test signal from the transmitter. The control circuit is further configured to adjust the plurality of receivers based on the output data generated by the plurality of receivers and received at the control circuit from the plurality of receivers.
Samsung Electronics Co., Ltd.
G G H G G G G H G H G G H G G G G G G G
G11C G11C H01L G11C G11C G11C G11C H01L G11C H01L G11C G11C H01L G11C G11C G11C G11C G11C G11C G11C
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Jung Hwan Jun Ha Yoo Chang Jin Seok Wang Soo Ju Ho
Choi Lee Sung Heo Kim Jeon