Volentine & Whitt, PLLC
Semiconductor memory device having self refresh mode and related method of operation
A semiconductor memory device supporting a self refresh operation is disclosed and comprises an address buffer unit and an operation control unit. The address buffer unit may be enabled during the self refresh operation by a first external control signal to generate an internal address signal. The operation control unit controls the start of the self refresh operation in response to the internal address signal.
Samsung Electronics Co., Ltd.
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inventional additional inventional
Young-Gu Ki-Ho Jung-Yong
Kang Jang Choi