NSIP Law
Method and apparatus for video decoding based on a multi-core processor
A multi-core processor device and a video decoding method using a multi-core processor, which can efficiently use system resources in a multi-core processor environment that requires a considerable amount of computation. The multi-core processor device includes a video decoder module which includes a plurality of function modules for performing video decoding; a memory which stores an input bitstream and loads the function modules; and a multi-core processor which includes a plurality of cores that perform a video decoding operation on the input bitstream by using the function modules, the cores including a first core and a second core, wherein, if the first core becomes idle during the video decoding operation, the second core allocates part of a remaining task of the second core to the first core and thus reduces an idle time of the first core.
Samsung Electronics Co., Ltd.
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Yun-Il Hyun-Ki Grigory Se-Hyun
Kim Baik Abuladze Bae