Memory cell
This invention relates generally to a memory cell. The embodiments of the present invention provide a SRAM cell and a SRAM cell array comprising such SRAM cell. The SRAM cell according to the embodiments of the present invention includes a pull-up transistor and a pull-down transistor, such that it is unnecessary to pre-charge a pre-read bit line at the time of performing read operation. By adopting the method of the present invention, generation of leakage current can be suppressed and hence power consumption of SRAM chip can be reduced.
International Business Machines Corporation
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G11C G11C G11C
inventional inventional inventional
Chao Xiao Xiao Xu Chen
Meng Li Zhang