Method for making an advanced guard ring for stacked film using a novel mask design
A method for making advanced guard rings in a stacked film on logic/merged DRAM circuits using a novel mask design is achieved. After forming a patterned amorphous silicon (a-Si) layer that has blanket portions over the logic region, a stacked film is deposited over the a-Si layer and extending over the edge and on the memory region. A first photoresist etch mask is used to pattern FET gate electrodes in the stacked film, and the etch mask includes a portion having a minimum width W over the edge of the a-Si layer to form a wide guard ring. This wide guard ring replaces a narrow guard ring that inadvertently forms during conventional processing and that is susceptible to peeling and particle contamination of the wafer. A second photoresist etch mask is used to pattern the a-Si layer to form FET gate electrodes over the logic region. The remaining process steps commonly practiced in the industry are carried out to complete the logic/merged DRAM circuit without the peeling and contamination that results from a narrow guard ring.
Taiwan Semiconductor Manufacturing Company
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additional inventional inventional
Tsu-Yu Chai-Der Yi-Tung
Chu Chang Yen