Sughrue Mion, PLLC
Semiconductor package including plurality of semiconductor chips on common connection structure
The present disclosure relates to a semiconductor package including a first semiconductor chip having a first surface on which first connection pads are disposed, and a second surface on which second connection pads are disposed, and including through-vias connected to the second connection pads; a connection structure disposed on the first surface and including a first redistribution layer; a first redistribution disposed on the second surface; and a second semiconductor chip disposed on the connection structure. The first connection pads are connected to a signal pattern of the first redistribution layer, and the second connection pads are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.
SAMSUNG ELECTRONICS CO., LTD.
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Han Yun Tae Jung Ho
Kim Lee Shim