Microprocessor with independent SIMD loop buffer
An apparatus comprising detection logic configured to detect a loop among a set of instructions, the loop comprising one or more instructions of a first type of instruction and a second type of instruction and a co-processor configured to execute the loop detected by the detection logic, the co-processor comprising an instruction queue. The apparatus further comprises fetch logic configured to fetch instructions; decode logic configured to determine instruction type; a processor configured to execute the loop detected by the detection logic, wherein the loop comprises one or more instructions of the first type of instruction, and an execution unit configured to execute the loop detected by the detection logic.
Texas Instruments Incorporated
G G G G G
G06F G06F G06F G06F G06F
inventional inventional inventional inventional inventional
Muralidharan S. Thang M.
Chinnakonda Tran