Jaffery Watson Mendonsa & Hamilton LLP
Compute optimization mechanism for deep neural networks
An apparatus to facilitate compute optimization is disclosed. The apparatus includes a memory device including a first integrated circuit (IC) including a plurality of memory channels and a second IC including a plurality of processing units, each coupled to a memory channel in the plurality of memory channels.
Intel Corporation
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Linda L. Sara S. Subramaniam Ben J. Narayan Abhishek R. Prasoonkumar Kamal Tsung-Han Jeffery S. John H. Nadathur Rajagopalan Josh B. Travis T. Nicolas C. Farshad Altug Wenyin Dukhwan Rajkishore Devan Feng Karthik Eriko Joydeep Justin E. Balaji Adam T.
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