Haynes and Boone, LLP
Method of fabricating high-k metal gate devices
The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first silicon layer by an in-situ deposition process, patterning the first silicon layer to remove a portion overlying the second region, patterning the first metal layer using the patterned first silicon layer as a mask, and removing the patterned first silicon layer including applying a solution. The solution includes a first component having an [F-] concentration greater than 0.01M, a second component configured to adjust a pH of the solution from about 4.3 to about 6.7, and a third component configured to adjust a potential of the solution to be greater than −1.4 volts.
Taiwan Semiconductor Manufacturing Company, Ltd.
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inventional inventional additional inventional
Yu-Ming Shao-Yen Chyi-Shyuan Chi-Ming Simon Su-Horng Chin-Hsiang
Lee Ku Chern Yang Lin Lin