William Park & Associates Ltd.
Stacked package and method for manufacturing the same
The stacked package includes: a substrate having an upper surface formed with connection pads, a lower surface, and four side surfaces; a first semiconductor chip mounted over the upper surface of the substrate; a first adhesive member that covers a portion of the substrate including the first semiconductor chip; and a second semiconductor chip formed with bumps on edges of a first surface and mounted over the substrate with interposition of the first semiconductor chip and the first adhesive member such that a center of the first surface is attached over the first adhesive member and the bumps are bonded onto the connection pads, with a second surface opposing to the first surface being polished evenly.
SK Hynix Inc.
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Young Berm
Jung