Tung & Associates
Split gate field effect transistor (FET) device employing non-linear polysilicon floating gate electrode dopant profile
Within both a split gate field effect transistor (FET) device and a method for fabricating the split gate field effect transistor (FET) device there is employed a doped polysilicon floating gate electrode having an central annular portion having a higher dopant concentration than a peripheral annular portion of the doped polysilicon floating gate electrode. The higher dopant concentration within the central annular portion of the doped polysilicon floating gate electrode provides enhanced programming speed properties of the split gate field effect transistor (FET) device. The lower dopant concentration within the peripheral annular portion of the doped polysilicon floating gate electrode provides enhanced erasing speed properties within the split gate field effect transistor (FET) device under certain circumstances of fabrication of the split gate field effect transistor (FET) device.
Taiwan Semiconductor Manufacturing Company, Ltd
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inventional inventional inventional
Chrong-Jung Chung-Li Di-Son Chia-Ta Jake Wen-Ting
Lin Chang Kuo Hsieh Yeh Chu