Metal gate transistor and method for fabricating the same
A method for fabricating a transistor having metal gate is disclosed. First, a substrate is provided, in which the substrate includes a first transistor region and a second transistor region. A plurality of dummy gates is formed on the substrate, and a dielectric layer is deposited on the dummy gate. The dummy gates are removed to form a plurality of openings in the dielectric layer. A high-k dielectric layer is formed to cover the surface of the dielectric layer and the opening, and a cap layer is formed on the high-k dielectric layer thereafter. The cap layer disposed in the second transistor region is removed, and a metal layer is deposited on the cap layer of the first transistor region and the high-k dielectric layer of the second transistor region. A conductive layer is formed to fill the openings of the first transistor region and the second transistor region.
United Microelectronics Corp.
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Chien-Ting Li-Wei Jung-Tsung Tian-Fu Che-Hua Chih-Hao Cheng-Hsien Chien-Ming Yi-Wen
Lin Cheng Tseng Chiang Hsu Yu Chou Lai Chen