Haynes and Boone, LLP
Structure and method for transistors with line end extension
A method includes forming an isolation feature in a semiconductor substrate; forming a first fin-like active region and a second fin-like active region in the semiconductor substrate and interposed by the isolation feature; forming a dummy gate stack on the isolation feature, wherein the dummy gate extends to the first fin-like active region from one side and to the second fin-like active region from another side.
Taiwan Semiconductor Manufacturing Company, Ltd.
H H H H H H H H H H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L
inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional
Chang-Yun Ming-Feng Hsin-Chih Kai-Tai Chih-Hao Kuei-Liang Yi-Tang Shao-Ming
Chang Shieh Chen Chang Chang Lu Lin Yu