Slater Matsil, LLP
Multi-die package with bridge layer and method for making the same
A package structure includes a substrate having a first bond pad layer. A silicon bridge layer having one or more redistribution layers therein. The silicon bridge layer has a second bond pad, and the silicon bridge layer is attached to the substrate by an adhesive layer. A first die is coupled to the substrate and the silicon bridge layer. A second die is coupled to the silicon bridge layer, wherein the first die and the second die communicate with one another by way of the one or more redistribution layers. Power and/or ground connectors are coupled to the first bond pad and the second bond pad for enabling grounding and/or transferring power from the semiconductor substrate to the second die.
Taiwan Semiconductor Manufacturing Company, Ltd.
H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H
H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L H01L
additional additional additional inventional additional additional additional additional additional additional additional additional additional additional additional additional additional inventional additional additional additional inventional additional additional additional inventional additional additional additional additional inventional inventional additional additional additional additional additional additional additional additional additional additional additional inventional additional additional additional additional additional inventional inventional additional additional additional additional additional additional additional additional additional additional additional additional inventional additional additional additional additional additional additional additional additional inventional additional additional additional additional inventional additional additional additional additional additional additional inventional additional additional additional additional inventional additional inventional additional additional additional additional additional additional additional inventional additional inventional inventional additional additional additional additional additional inventional inventional additional additional inventional additional additional additional additional additional additional inventional additional additional additional additional additional additional additional inventional additional additional additional additional additional additional additional additional additional additional additional additional inventional additional additional additional additional additional additional additional additional additional
Wei Sen Mirng-Ji Chen-Shien Yu-Feng
Chang Lii Chen Chen