Method of fabricating a gate-all-around word line for a vertical channel DRAM
A method of fabricating a self-aligned buried wordline in a structure which contains a self-aligned buried bit line, where the overall structure which makes up a portion of a vertical channel DRAM. The materials and processes used enable self-alignment of elements of the buried wordline during the fabrication process. In addition, the materials and processes used enable for formation of individual DRAM cells which have a buried bit line width which is 16 nm or less and a perpendicular buried wordline width which is 24 nm or less.
Applied Materials, Inc.
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inventional inventional additional
Er-Xuan Judon Tony Chorng-Ping
Ping Pan Chang