Haynes and Boone, LLP
Asymmetric source/drain depths
A method for fabricating a semiconductor device includes forming a relaxed semiconductor layer on a substrate, the substrate comprising an n-type region and a p-type region. The method further includes forming a tensile strained semiconductor layer on the relaxed semiconductor layer, etching a portion of the tensile strained semiconductor layer in the p-type region, forming a compressive strained semiconductor layer on the tensile strained semiconductor layer in the p-type region, forming a first gate in the n-type region and a second gate in the p-type region, and forming a first set of source/drain features adjacent to the first gate and a second set of source/drain features adjacent to the second gate. The second set of source/drain features are deeper than the first set of source/drain features.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Tsung-Lin Yu-Lin Chih-Sheng Chia-Cheng Cheng-Yi Yee-Chia Chih Chieh Jung-Piao
Lee Yang Chang Ho Peng Yeo Yeh Chiu