Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Semiconductor device having isolation region and method of manufacturing the same
A trench isolation region is formed in a surface region of a semiconductor substrate to form a MOS type element region. A mask layer having an opening portion is formed on the semiconductor layer, the opening portion continuously ranging on the entire surface of the MOS type element region and on part of the trench isolation region provided around the MOS type element region. A first impurity ion is implanted into the entire surface via the mask layer to form a peak of the impurity profile is situated in the semiconductor layer under the bottom surface of the shallow trench isolation region. A second impurity ion is implanted into the entire surface via the mask layer to form a peak of the impurity profile is situated on the midway of the depth direction of the trench isolation region. Then, the first and second impurity ions are activated.
Kabushiki Kaisha Toshiba
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inventional inventional inventional additional inventional
Norihisa Koki Takeshi Akira
Arai Ueno Nakano Shimizu