Volentine & Whitt, PLLC
Delay-locked loop for correcting duty ratio of input clock signal and output clock signal and electronic device including the same
A delay-locked loop includes a delay line and a duty correction block. The delay line includes receives an input clock signal and includes a cascade of delay cells for respectively generating a plurality of delayed input clock signals based on the input clock signal. The duty correction block is for correcting a duty ratio of the input clock signal based on a duty ratio of at least one clock signal from among the input clock signal and the plurality of delayed input clock signals in a first duty correction operation in which the duty ratio of the input clock signal is corrected, and correcting a duty ratio of an output clock signal based on the duty ratio of the output clock in a second duty correction operation in which the duty ratio of the output clock signal is corrected.
Samsung Electronics Co., Ltd.
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Chang-Hyun Jun Bae
Bae Kim