Thomas, Kayden, Horstemeyer & Risley, LLP
Leakage current suppressing circuit and semiconductor chip
A leakage current suppressing circuit includes a bias generating unit and a switch unit. The bias generating unit is adapted to be coupled to a power source and an output terminal, and generates a bias voltage substantially equal to a voltage at the power source when the power source is turned on, and substantially equal to a voltage at the output terminal when the power source is turned off. The switch unit includes a first P-type transistor having a first terminal adapted to be coupled to the power source, a second terminal adapted to be coupled to the output terminal, a gate terminal, and a body terminal coupled to the bias generating unit for receiving the bias voltage therefrom.
Realtek Semiconductor Corp.
H H
H03K H03K
inventional inventional
Tay-Her Jian Tzu-Chien
Tsaur Liu Tzeng