Posz Law Group, PLC
Method for manufacturing semiconductor device with planer gate electrode and trench gate electrode
A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.
DENSO CORPORATION
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Akira Satoshi Yoshiaki Shoji Takashi
Yamada Shiraki Nakayama Mizuno Nakano