WPAT, PC
Shift register
An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.
Au Optronics Corp.
G G G
G11C G09G G11C
inventional additional inventional
Yu-Chung Kuo-Chang Yung-Chih Chun-Hsin
Yang Su Chen Liu