IP & T Group LLP
Method for fabricating 3D nonvolatile memory device with vertical channel hole
A method for fabricating a nonvolatile memory device includes forming a stacked structure having a plurality of interlayer dielectric layers and a plurality of sacrificial layers wherein interlayer dielectric layers and sacrificial layers are alternately stacked over a substrate, forming a first hole exposing a part of the substrate by selectively etching the stacked structure, forming a first insulation layer in the first hole, forming a second hole exposing the part of the substrate by selectively etching the first insulation layer, and forming a channel layer in the second hole.
SK Hynix Inc.
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inventional inventional inventional
Tae-Hwa Young-Soo Yun-Kyoung Sung-Wook
Lee Ahn Lee Jung