System and method for scheduling memory instructions to provide adequate prefetch latency
A method and apparatus for scheduling instructions to provide adequate prefetch latency is disclosed during compilation of a program code in to a program. The prefetch scheduler component of the present invention selects a memory operation within the program code as a &#8220;martyr load&#8221; and removes the prefetch associated with the martyr load, if any. The prefetch scheduler takes advantage of the latency associated with the martyr load to schedule prefetches for memory operations which follow the martyr load. The prefetches are scheduled &#8220;behind&#8221; (i.e., prior to) the martyr load to allow the prefetches to complete before the associated memory operations are carried out. The prefetch schedule component continues this process throughout the program code to optimize prefetch scheduling and overall program operation.
Sun Microsystems, Inc.
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Partha Pal Joseph Peter C. Nicolai
Tirumalai Chamdani Damron Kosche