Fish & Richardson P.C.
Generating integrated circuit placements using neural networks
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.
Google LLC
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inventional inventional inventional inventional
Young-Joon Roger David Ebrahim Omkar Jeffrey Adgate Wenjie James Quoc V. Mustafa Nazim Anna Darling Shen Azalia Kavya Chian-Min Richard
Lee Carpenter Songhori Pathak Dean Jiang Laudon Le Yazgan Goldie Wang Mirhoseini Srinivasa Setty Ho