Gate driver circuit for H bridge circuit
An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.
Freescale Semiconductor, Inc.
H H
H03K H02M
inventional inventional
Weiying Hongwei Waley Iven Linpeng
Li Zhao Li Zheng Wei