One step dual salicide formation for ultra shallow junction applications
A process for formation of metal silicide on elements of an NMOS device and on elements of a PMOS device, wherein the metal silicide formed on elements of the PMOS device is thinner than the metal silicide simultaneously formed on elements of said NMOS device, has been developed. The process features the implantation of metal ions such as titanium, tantalum, vanadium, or rhenium, during the implantation procedure used for formation of the heavily doped P type source/drain region of the PMOS device. The presence of the implanted metal ions in PMOS regions retard the formation of metal silicide resulting in a thinner metal silicide layer on the heavily doped P type source/drain region, when compared to the thicker metal silicide counterparts simultaneously formed on elements of the NMOS device. The thinner metal silicide for the PMOS device reduces the risk of junction leakage at the heavily doped P type source/drain&#8212;N well interface, while the thicker metal silicide layer located on elements of the NMOS device, allow lower word line resistance to be realized.
Taiwan Semiconductor Manufacturing Company
H H
H01L H01L
inventional inventional
Mei-Yun Chih-Wei
Wang Chang