Antonelli, Terry, Stout & Kraus, LLP
Flash memory control method and apparatus processing system therewith
 A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address. The control section is responsive to the interface information, the first management information, and the second management information for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory. The consecutive address generation means and the sector address storage means output the physical sector address and the consecutively generated addresses to the first nonvolatile memory and the volatile memory when data at the physical sector address is output from the first nonvolatile memory or when data at the physical sector address is input to the volatile memory. 
Hitachi, LTD Hitachi Keiyo Engineering Co., Ltd. Hitachi ULSI Engineering Corp.
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Takashi Jun Ryuichi Kenichi Takeshi Takashi Takao Manabu Takeshi Shigeru Tsunehiro Takashi Yosio Hajime Yukihiro Kunihiro Masamichi
Tsunehiro Kitahara Hattori Kaki Suzuki Kikuchi Okubo Saito Wada Kadowaki Tobita Totsuka Takaya Yamagami Seki Katayama Kishi