Rothwell, Figg, Ernst & Manbeck
Trench-gate power semiconductor device preventing latch-up and method for fabricating the same
A trench-gate power semiconductor device and a method for fabricating the same are provided. The trench-gate power semiconductor device includes a semiconductor substrate of a first conductivity type used as a collector region, a buffer layer of a second conductivity type formed on the semiconductor substrate, a drift region of a second conductivity type formed on the buffer layer, a base region of a first conductivity type formed on the drift region, a gate dielectric layer formed on the surface of a trench which is formed down to a predetermined depth into the drift region and surrounds the base region, a gate electrode formed on the gate dielectric layer, an emitter region of a second conductivity type contacting both the surface of the base region and an upper sidewall of the trench in the base region, the emitter region contains a first emitter region formed so as to be extended to a predetermined length along the sidewall of the trench and to be alternately arranged in the base region and a second emitter region extended to a predetermined length from the first emitter to the center of the base region, an emitter electrode formed so as to be electrically connected to the first emitter region through a part of the second emitter region, and a collector electrode formed so as to be electrically connected to the semiconductor substrate.
Fairchild Korea Semiconductor Ltd.
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inventional inventional inventional inventional
Ju-il Hyun-chul Chong-man Kyu-hyun
Kim Kim Yun Lee