Muncy, Geissler, Olds & Lowe, P.C.
System and method of shared bit line MRAM
An STT magnetic memory includes adjacent columns of STT magnetic memory elements having a top electrode and a bottom electrode. A shared bit line is coupled to the top electrode of the STT magnetic memory elements in at least two of the adjacent columns. The bottom electrodes of the STT magnetic memory elements of one of the adjacent columns are selectively coupled to one source line, and the bottom electrodes of the STT magnetic memory elements of another among the adjacent columns are selectively coupled to another source line.
QUALCOMM Incorporated
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Seung Hyuk Xia Xiaochun
Kang Li Zhu