Eschweiler & Potashnik, LLC
Semiconductor device and method of manufacturing
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip having a flash gate structure disposed over a substrate and including a control gate separated from a floating gate by an inter-electrode dielectric. One or more first sidewall spacers laterally surround the flash gate structure. The inter-electrode dielectric is directly between the one or more first sidewall spacers. A logic gate structure is disposed over the substrate and is laterally surrounded by one or more second sidewall spacers having a smaller height than the one or more first sidewall spacers.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Josh Chen-Ming Chia-Ta Chi-Wei
Lin Huang Hsieh Ho