Sughrue Mion, PLLC
Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design system
A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector.
SAMSUNG ELECTRONICS CO., LTD.
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inventional inventional inventional inventional
Chang-wook Youn-sik Kwang-il Jeong-hoon Hyo-jin Joon-wan Jun-haeng Young-min Hyun-sun Tae-ho Seung-ju In
Jeong Park Park Ko Choi Chai Lee Oh Park Lee Kim Huh