Muir Patent Law, PLLC
Semiconductor package and method of fabricating the same
Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first package having a first package substrate mounted with a lower semiconductor chip, and a second package having a second package substrate mounted with upper semiconductor chips. The second package substrate includes a chip region on which the upper semiconductor chips are mounted, and a connection region provided therearound. The chip region includes a first surface defining a first recess region and a second surface defining a first protruding portion. The upper semiconductor chips are mounted on opposite edges of the second surface and spaced apart from each other to have portions protruding toward the connection region beyond the chip region.
SAMSUNG ELECTRONICS CO., LTD.
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additional additional inventional additional additional additional inventional additional additional additional inventional additional additional inventional additional additional additional additional additional additional additional additional additional inventional inventional additional additional additional additional additional additional additional additional inventional additional additional additional additional
Jongho Chul-Yong Seokhyun
Lee Jang Lee