Blakely, Sokoloff, Taylor & Zafman
Method for accessing and transmitting data to/from a memory in packets
 A method of transmitting digital information to a memory circuit of a plurality of memory circuits of a computer system through a multiline bus of the computer system is described. The plurality of memory circuits are coupled together via the multiline bus. The multiline bus has a total number of lines less than a total number of bits in any single address. A first word of a packet is transmitted onto the multiline bus. A second word of the packet is then transmitted onto the multiline bus. The second word of the packet includes a first portion of an address. A third word of the packet is transmitted onto the multiline bus. The third word of the packet includes a second portion of the address. 
Rambus, Inc.
G G G G G G G G G G G G G G G G G G G G G G G G G G G G G Y G G G G G G G
G06F G11C G06F G11C G11C G11C G11C G11C G11C G06F G06F G06F G06F G06F G11C G06F G11C G11C G11C G11C G11C G11C G06F G11C G11C G06F G11C G11C G06F Y02D G06F G11C G11C G11C G11C G11C G11C
inventional inventional additional additional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional inventional additional inventional inventional inventional inventional inventional inventional inventional
Michael Mark
Farmwald Horowitz