High latency interface between hardware components
A system includes a hard disk controller and a read/write channel. The hard disk controller is configured to transmit a first gate signal, a write clock signal, mode selection data, and first data to be stored on a storage medium, and receive a read clock signal and second data stored on the storage medium. The read/write channel is configured to receive the first gate signal, the write clock signal, the mode selection data, and the first data, transmit the read clock signal, transfer the second data from the storage medium to the hard disk controller based on the mode selection data and the read clock signal, and transfer the first data from the hard disk controller to the storage medium based on the mode selection data and the write clock signal.
Marvell International Ltd.
G
G06F
inventional
Saeed
Azimi