Morgan, Lewis & Bockius LLP
Low latency multi-level communication interface
A memory system uses multiple pulse amplitude modulation (multi-PAM) output drivers and receivers to send and receive multi-PAM signals. A multi-PAM signal has more than two voltage levels, with each data interval now transmitting a “symbol” at one of the valid voltage levels. In one embodiment, a symbol represents two or more bits. The multi-PAM output driver drives an output symbol onto a signal line. The output symbol represents at least two bits that include a most significant bit (MSB) and a least significant bit (LSB). The multi-PAM receiver receives the output symbol from the signal line and determines the MSB and the LSB.
Rambus Inc.
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Pak S. Bruno W. Carl W. Stefanos Billy W. Mark A. Jared L. Kevin S.
Chau Garlepp Werner Sidiropoulos Garrett, Jr. Horowitz Zerbe Donnelly