Jiang Chyun IP Office
Rational number frequency multiplier circuit and method for generated rational number frequency
A rational number frequency multiplier circuit and a method for generating rational number multiple frequency are disclosed. The circuit receives a plurality of input signals having the same frequency and different phase, and outputs at least one multiple frequency signal. The rational number frequency multiplier circuit includes a frequency divider module, for receiving and dividing the input signals to output frequency-divided signals having the same frequency and different phase; a first phase synthesis module and a second phase synthesis module for receiving and synthesizing the frequency-divided and input signals respectively into a plurality of first pulse period signals and second pulse period signals; and an adder for receiving and combining the first pulse period signals and the second pulse period signals into the multiple frequency signal according to the desired multiplication of the frequency.
Prolific Technology Inc.
H H
H03K H03L
inventional additional
Kuo-Jen Wen-Hwa Yu-Kuo
Kuo Chou Chen