Passivation etching procedure, using a polysilicon stop layer, for repairing embedded DRAM cells
 A process of opening, a stack of large diameter via holes, in a multiple levels of insulator layers, to be used for access of a laser repair procedure, applied to underlying integrated circuit shapes, while simultaneously opening small diameter via holes, in the same multiple levels of insulator layers, to be used to accommodate metal plug structures, has been developed. The process features the use of a polysilicon stop layer, used at the bottom of the stack of large diameter via holes, protecting underlying components of the underlying integrated circuit, from the dry and wet etching procedures used for the creation of the stack of large diameter via holes. The process also features the formation of metal spacers, on the sides of the large diameter via holes, created simultaneously during the formation of metal plug structures, and used again to protect the multiple levels of insulator layer, that would have been exposed, if left unprotected, during a wet etching procedure. 
Taiwan Semiconductor Manufacturing Company
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Yu-Hua James
Lee Wu