Mattingly, Stanger & Malur, P.C.
Timing-control circuit device and clock distribution system
 A timing-control circuit device, which uses a synchronous mirror delay circuit, for keeping the synchronization between clock signals in phase even at a load change. A reference clock signal (clkin 11) is entered to a timing-control circuit (SMDF 14) and used to generate an internal clock (dclk 12), then generates an external clock (clkout 13) through a buffer (BUF 15). The external clock signal is fed back to the timing-control circuit (SMDF 14) and used to generate an internal clock signal so as to synchronize the external clock signal in phase with the reference clock signal. The timing-control circuit is provided with a circuit (FDA 21, MCC 22) for detecting a phase difference between the internal clock signal and the external clock signal, as well as a delay circuit (DCL 24) for controlling a delay time, so that the delay circuit (DCL 24) can change the delay time according to the detected phase difference. 
Hitachi, Ltd. Hitachi ULSI Systems Co., Ltd.
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H04L G06F H04L H03K
inventional inventional inventional inventional
Hiroyuki Kiyoshi Koichiro Hirokazu Masaru Masayuki Satoru Takeshi
Mizuno Hasegawa Ishibashi Aoki Kokubo Miyazaki Hanzawa Sakata