Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on test wafers that include multiple means/steps for enabling NC detection of V0 via opens
Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of V0 via opens.
PDF Solutions, Inc.
G G H H H H G H H G G H H H H H G H H H H H
G06F G06F H01L H01L H01L H01L G01R H01L H01L G06F G06F H01L H01L H01L H01L H01L G06F H01L H01L H01L H01L H01L
additional additional inventional additional additional inventional inventional additional inventional additional additional additional inventional inventional additional inventional additional inventional inventional inventional inventional inventional
Sheng-Che Hans Rakesh Christopher Timothy Dennis Stephen Markus Simone Marci Indranil Kimon Sherry Tomasz Andrzej Kelvin Hideki Carl Conor Nobuharu Vyacheslav Jeremy John Larg Marcin Jonathan
Lin Eisenmann Vallishayee Hess Fiscus Ciplickas Lam Rauscher Comensoli Liao De Michaels Lee Brozek Strojwas Doong Matsuhashi Taylor O'Sullivan Yokoyama Rovner Cheng Kibarian Weiland Strojwas Haigh