Self-aligned replacement metal gate process for QWFET devices
A self-aligned replacement metal gate QWFET device comprises a III-V quantum well layer formed on a substrate, a III-V barrier layer formed on the quantum well layer, a III-V etch stop layer formed on the III-V barrier layer, a III-V source extension region formed on the III-V etch stop layer and having a first sidewall, a source region formed on the III-V source extension region and having a second sidewall, a III-V drain extension region formed on the III-V etch stop layer and having a third sidewall, a drain region formed on the III-V drain extension region and having a fourth sidewall, a conformal high-k gate dielectric layer formed on the first, second, third, and fourth sidewalls and on a top surface of the etch stop layer, and a metal layer formed on the high-k gate dielectric layer.
Intel Corporation
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Marko Benjamin Mantu K. Ravi
Radosavljevic Chu-Kung Hudait Pillarisetty