The Marbury Law Group PLLC
Three-dimensional memory devices having a single layer channel and methods of making thereof
A memory stack structure for a three-dimensional device includes an alternating stack of insulator layers and spacer material layers. A memory opening is formed through the alternating stack. A memory material layer, a tunneling dielectric layer, and a silicon oxide liner are formed in the memory opening. A sacrificial liner is subsequently formed over the tunneling dielectric layer. The layer stack is anisotropically etched to physically expose a semiconductor surface of the substrate underneath the memory opening. The sacrificial liner may be removed prior to, or after, the anisotropic etch. The silicon oxide liner is removed after the anisotropic etch. A semiconductor channel layer can be deposited directly on the tunneling dielectric layer as a single material layer without any interface therein.
SANDISK TECHNOLOGIES LLC
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Wei Zhenyu Sateesh Rahul Ching-Huang Raghuveer S. Henry Hiroyuki George Yingda Yuichi Somesh
Zhao Lu Koka Sharangpani Lu Makala Chien Ogawa Matamis Dong Ikezono Peri