Edell, Shapiro & Finnan, LLC
Built-in self-test circuit applied to high speed I/O port
A built-in self-test circuit (BIST) applied to a high speed I/O port is provided. The BIST circuit includes a detecting unit, a flag unit and a selecting unit. The detecting unit has a first input terminal for receiving a serial output signal, a second input terminal for receiving a serial enable signal, and an output terminal for generating a detection signal. The flag unit receives the detection signal and generates a flag signal. The selecting unit receives the serial output signal, the serial enable signal and the flag signal. When a reset signal is at a first level, the selecting unit transmits the serial output signal and the serial enable signal to the I/O port. When the reset signal is at a second level, the serial output signal and the serial enable signal possesses a predetermined relationship.
MStar Semiconductor, Inc.
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Chung-Ching Hsian-Feng Yu-Lin
Chen Liu Chen