Sheridan Ross P.C.
Image information processing apparatus using single phase-locked loop
 An image information processing apparatus is described that suppresses noise generated in digital signal processing while preventing the circuit scale from enlarging. The apparatus includes a separator, a first detector, a second detector, a phase-locked loop, an A/D converter, a phase difference detector, a chrominance data processor and a luminance data processor. The phase difference detector detects a phase difference between the reference clock signal and the scan sync signal. The luminance data processor combines the luminance data in Units of two pieces to produce compensated luminance data in accordance with the phase difference. 
Sanyo Electric Co., Ltd. Casio Computer Co., Ltd.
H H
H04N H04N
inventional additional
Kunio Hiroya
Okada Ito