Craig and Antonelli
Insulated-gate semiconductor device
 An insulated-gate semiconductor device wherein a first region is formed in the surface of a semiconductor substrate, the first region having a conductivity type opposite to that of the substrate, two insulated-gate FET's are formed within the first region, the drain of the first insulated-gate FET and that of the second insulated-gate FET are made common, the drains are electrically connected to the first region, and the gate of the first insulated-gate FET and the source of the second insulated-gate FET, and the gate of the second insulated-gate FET and the source of the first insulated-gate FET are respectively connected, thereby to prevent the occurrence of a negative resistance. 
Hitachi, Ltd.
H
H01L
inventional
Shikayuki Takeaki Mineo Isao Hidefumi Masatomo
Ochi Okabe Katsueda Yoshida Ito Furumi