Slater & Matsil, L.L.P.
MOS devices with improved source/drain regions with SiGe
A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Chung Li Wei-Hua Chun-Chieh Chi-Feng Kishimoto Yu-En Percy Win
Chang Hsu Lin Cheng Ko Chang Hung