Ropes & Gray LLP
High-speed serial interface circuitry for programmable logic device integrated circuits
High-speed serial interface (“HSSI”) transceiver circuitry (e.g., on a programmable logic device (“PLD”) integrated circuit) includes input buffer circuitry with adaptive equalization capability. The transceiver circuitry also includes an output driver, which may include pre-emphasis capability (preferably controllably settable). Selectively usable loop-back circuitry is provided for allowing the output signal of the input buffer to be applied substantially directly to the output driver. The loop-back circuitry may include a loop-back driver, which may be turned on substantially only when needed for loop-back operations.
Altera Corporation
H
H03K
inventional
Thungoc M. Sergey Simardeep Wilson
Tran Shumarayev Maangat Wong