Memory interface device with processing capability
 An interface device to provide a data and address path between a data processor, a memory and peripheral devices. The interface device includes an internal arithmetic and logic unit to provide a means for generating and/or modifying addresses for the memory or peripheral devices. The device further includes a plurality of registers for temporarily storing data or addresses as well as information associated with addressing functions, for example, program counter, index register, stack pointer and page addresses. The interface device may be used singly or in combination with like devices as in a slice processing system. 
Motorola, Inc.
G
G06F
inventional
Thomas J. Jack L.
Balph Anderson