Myers Bigel Sibley & Sajovec, P.A.
Non-volatile memory devices
In one embodiment, a semiconductor memory device includes a substrate having first and second active regions. The first active region includes a first source and drain regions and the second active region includes a second source and drain regions. A first interlayer dielectric is located over the substrate. A first conductive structure extends through the first interlayer dielectric. A first bit line is on the first interlayer dielectric. A second interlayer dielectric is on the first interlayer dielectric. A contact hole extends through the second and first interlayer dielectrics. The device includes a second conductive structure within the contact hole and extending through the first and second interlayer dielectrics. A second bit line is on the second interlayer dielectric. A width of the contact hole at a bottom of the second interlayer dielectric is less than or substantially equal to a width at a top of the second interlayer dielectric.
Samsung Electronics Co., Ltd.
H H H H
H01L H01L H01L H01L
inventional additional inventional inventional
Choong-Ho Hee-Soo Ju-Hyuck Jung-Dal Dong-uk Jong-Sun
Lee Kang Chung Choi Choi Sel