Haynes and Boone, LLP
Fabricating high-K/metal gate devices in a gate last process
The present disclosure provides a method that includes forming first and second gate structures over first and second regions, respectively, removing a first dummy gate and first dummy dielectric from the first gate structure thereby forming a first trench and removing a second dummy gate and second dummy dielectric from the second gate structure thereby forming a second trench, forming a gate layer to partially fill the first and second trenches, forming a material layer to fill the remainder of the first and second trenches, removing a portion of the material layer such that a remaining portion of the material layer protects a first portion of the gate layer located at a bottom portion of the first and second trenches, removing a second portion of the gate layer, removing the remaining portion of the material layer from the first and second trenches.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Da-Yuan Jian-Hao Hsing-Jui Chi-Chun Matt
Lee Chen Lee Chen Yeh