Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
Semiconductor device having elevated source/drain on source region and drain region
A semiconductor device disclosed herein comprises: an element isolation insulator which is formed on the surface side of a semiconductor substrate to provide electrical insulation from other elements, a height of a surface of the element isolation insulator being equal to or lower than that of a surface of the semiconductor substrate; a stopper which is formed of a material different from that of the element isolation insulator and which is at a predetermined distance from the semiconductor substrate so as to protrude from the surface of the element isolation insulator; and an elevated source/drain which is formed on a source region and a drain region so as to be elevated from the surface of the semiconductor substrate.
Kabushiki Kaisha Toshiba
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inventional inventional inventional
Hitoshi
Ito