Duane Morris LLP
Pulse generator
A circuit includes a logic gate and a latch. The logic gate is configured to receive a clock signal at a first input. The latch is disposed in a feedback loop of the logic gate and is configured to output a feedback signal to a second input of the logic gate in response to a signal output by the logic gate and the clock signal. The circuit is configured to output a pulsed signal based on one of a rising edge or a falling edge of the clock signal.
Taiwan Semiconductor Manufacturing Co., Ltd.
H
H03K
inventional
Sang Hoo Jen-Hang Ta-Pen Osamu Ming-Zhang Shang-Chih Chih-Chiang
Dong Yang Guo Takahashi Kuo Hsieh Chang