Synchronous memory device utilizing request protocol and method of operation of same
 A method of operation of a synchronous memory device having at least one memory section which includes a plurality of memory locations. The method comprises receiving an external clock signal having a fixed frequency, receiving a read request, including addressing information, synchronously with respect to the external clock signal, initiating an internal memory addressing operation, in response to the read request, and outputting data onto the external bus synchronously with respect to the external clock signal. The synchronous memory device may include interface circuitry, coupled to an external bus, to receive a write request packet synchronously with respect to an external clock. The write request packet may include N bits of information and the external bus includes M number of signal lines wherein N is substantially greater than M. The synchronous memory device may also include input receiver circuitry, coupled to the external bus, to receive data from the external bus synchronously with respect to the external clock wherein the received data is stored in the synchronous memory device in response to the write request packet. 
Rambus Inc.
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Mark Michael
Horowitz Farmwald