Phase locked loop for controlling recordable optical disk drive
A phase locked loop (PLL) for generating an oscillation signal such that the oscillation signal maintains a substantially constant phase difference with respect to a phase of a reference signal. The PLL includes a first frequency divider for dividing a frequency of the oscillation signal by a first divisor, and for generating a number of multiphase signals, such that each multiphase signal is out of phase with each of the other multiphase signals, a phase shift detection circuit for comparing a phase of the oscillation signal with the phase of the reference signal, and a phase adjusting circuit for selecting one of the multiphase signals generated by the first frequency divider to be an output signal such that the PLL is able to reduce the phase difference between the oscillation signal and the reference signal.
Mediatek Incorporation
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inventional additional inventional inventional
Hung-Ching Tse-Hsiang
Chen Hsu