WPAT, PC
Multiphase clock generator and associated frequency synthesizer
A multiphase clock generator includes a current mirror, a voltage controller, a pseudo-resistor circuit and a first delaying circuit. The current mirror includes a receiving terminal, a first mirroring terminal and a second mirroring terminal. The voltage controller is connected with the receiving terminal of the current mirror. A feedback terminal of the voltage controller is connected with the first mirroring terminal of the current mirror. A first terminal of the pseudo-resistor circuit is connected with the first mirroring terminal of the current mirror. A second terminal of the pseudo-resistor circuit is connected with a ground terminal. The first delaying circuit is connected with the second terminal of the pseudo-resistor circuit. An input terminal of the first delaying circuit receives a first input clock signal. An output terminal of the first delaying circuit generates a first delayed clock signal.
EMEMORY TECHNOLOGY INC.
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Che-Wei
Chang