Fliesler, Dubb, Meyer & Lovejoy, LLP
EEPROM cell with tunneling across entire separated channels
An EEPROM cell is described that is programmed and erased by electron tunneling across an entire portion of separate transistor channels. The EEPROM cell has three transistors formed in a semiconductor substrate. The three transistors are a tunneling transistor (PMOS), a sense transistor (NMOS) and a read transistor (NMOS). Electron tunneling occurs to program the EEPROM cell through a sense tunnel oxide layer having a thickness to allow the electron tunneling across an entire portion of a sense channel upon incurrence of a sufficient voltage potential between a floating gate and the tunnel channel. Electron tunneling also occurs to erase the EEPROM cell through a tunnel oxide layer having a thickness to allow electron tunneling across an entire portion of a tunneling channel upon incurrence of a sufficient voltage potential between the floating gate and the tunneling channel.
Vantis Corporation
H H G H
H01L H01L G11C H01L
inventional inventional inventional inventional
Steven J. Xiao-Yu
Fong Li