Low voltage field emission device
 With a view to reducing the gate voltage in Field Emission Devices, three different methods for reducing the diameter of the gate opening in such devices are described. In the first method, metal is deposited on the gate electrode (which is made of polysilicon or amorphous silicon) at an oblique angle of incidence so that the vertical wall of the opening is coated, but not its lower surface. In the second method, all exposed surfaces are coated with metal. For both methods, metal is then removed from all non-polysilicon surfaces through a silicidation step followed by selective etching. In the third method, the gate electrode is selectively coated with a layer of tungsten. In all cases, a uniform reduction of the gate opening is achieved. 
Industrial Technology Research Institute
H H
H01J H01J
inventional inventional
Chi-Hua Wen-Chun Jiun-Tsuen
Wang Wang Lai