Withrow & Terranova, PLLC
Dynamically controlling voltage for access operations to magneto-resistive random access memory (MRAM) bit cells to account for process variations
Dynamically controlling voltage for access (i.e., read and/or write) operations to magneto-resistive random access memory (MRAM) bit cells to account for process variations is disclosed. An MRAM bit cell process variation measurement circuit (PVMC) is configured to measure process variations in MTJs that affect MTJ resistance, which can change write current at a given fixed supply voltage applied to an MRAM bit cell. The MRAM bit cell PVMC may also be configured to measure process variations in logic circuits representing process variations in access transistors employed in MRAM bit cells. These measured process variations in MTJs and/or logic circuits are used to dynamically determine a supply voltage for access operations to MRAM.
QUALCOMM Incorporated
Seung Hyuk Xiaochun Xia
Kang Zhu Li