Volentine & Whitt, PLLC
Method for forming interconnection line in semiconductor device and interconnection line structure
Methods for forming an interconnection line and interconnection line structures are disclosed. The method includes forming an interlayer insulating layer on a semiconductor substrate, wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer is formed on the interlayer insulating layer. An oxide capping layer is formed on the oxidation barrier layer. A via hole is in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern is formed within the via hole.
Samsung Electronics Co., Ltd.
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Jae-Hak Ki-Kwan Young-Jin Seung-Jin Hong-Jae Kyoung-Woo
Kim Park Wee Lee Shin Lee