IP & T Group LLP
Memory controller having memory unit including tables, memory system having the memory unit including the tables and operating method of the memory controller
Disclosed is a memory controller comprising: a memory unit including tables, in which various segments are stored; a calculator configured to update a parity for the segments stored in each of the tables whenever the table is updated when a segment is currently inputted, detect an error in the table based on a previously updated parity and a currently updated parity corresponding to the table; and a bit inverter configured to correct the detected error, and an operating method therefor.
SK hynix Inc.
G G G G G G H H
G06F G06F G11C G06F G11C G06F H03M H03M
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Kyung Hoon Jung Woo Se Hyun Eun Soo
Lee Kim Kim Jang