Sterne, Kessler, Goldstein & Fox P.L.L.C.
Step height mitigation in resistive random access memory structures
The present disclosure is directed to a method for the formation of resistive random-access memory (RRAM) structures with a low profile between or within metallization layers. For example, the method includes forming, on a substrate, a first metallization layer with conductive structures and a first dielectric layer abutting sidewall surfaces of the conductive structures; etching a portion of the first dielectric layer to expose a portion of the sidewall surfaces of the conductive structures; depositing a memory stack on the first metallization layer, the exposed portion of the sidewall surfaces, and a top surface of the conductive structures; patterning the memory stack to form a memory structure that covers the exposed portion of the sidewall surfaces and the top surface of the conductive structures; depositing a second dielectric layer to encapsulate the memory stack; and forming a second metallization layer on the second dielectric layer.
Taiwan Semiconductor Manufacturing Co., Ltd.
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Wen-Ting Chia-Wei Jen-Sheng Huei-Tzu Wei-Ming Yu-Wen
Chu Liu Yang Wang Wang Liao