Identifying and resolving issues with plated through vias in voltage divider regions
Identifying and resolving issues with placement of plated through vias in voltage divider regions of a printed circuit board (“PCB”) layout. Search parameters indicate an area of the PCB layout to be analyzed, and vias meeting the search parameters are evaluated for placement issues. Upon detecting a placement issue for a via, a solution is determined that addresses and resolves the placement issue of the via. The resolution in an embodiment includes modifying an adjacent power shape, modifying a region between shapes, and/or modifying via placement to minimize risks that include potential shorting, partially-connected vias, and/or poor plated barrel adhesion.
International Business Machines Corporation
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inventional inventional additional
Julio A. David L. Michael A. Diana D.
Maldonado Green Christo Zurovetz