Lowe, Price, LeBlanc & Becker
Semiconductor memory device
 An improved semiconductor memory device in which an electric circuit operates normally is provided. A block of memory cells of a dynamic random access memory is provided on a semiconductor substrate. A dummy storage node is provided near a corner portion of the memory cell block. A dummy cell plate is provided such that it covers the dummy storage node and is electrically insulated from a main cell plate of the DRAM. 
Ryoden Semiconductor System Engineering Corporation Mitsubishi Denki Kabushiki Kaisha
G H H
G11C H01L H01L
inventional inventional inventional
Hiroshi Shinya Yuichi Shinya
Matsuo Watanabe Yokoyama Inoue