Ropes & Gray LLP
Circuitry for facilitating performance of multiply-accumulate operations in programmable logic devices
In circuitry such as a programmable logic device (“PLD”), each of several multiplier blocks includes partial products generation circuitry and partial products addition circuitry. Two such multiplier blocks can be used together to provide multiply-accumulate (“MAC”) capability. The partial products addition circuitry in one of the paired blocks is used to add each successive product produced by the other paired block to a previous accumulation of products in the first-mentioned paired block. Provisions are also made for accumulating any overflow from operation of the partial products addition circuitry in the first-mentioned paired block.
Altera Corporation
H G H G
H03K G06F H03K G06F
inventional inventional inventional additional
Jun Pin Boon Jin Bee Yee Tat Mun
Tan Ang Ng Lui