Staas & Halsey LLP
Processor debugging apparatus and processor debugging method
A processor debugging apparatus that scans and reads a latch in a processor includes a register that stores a value of a predetermined signal in the processor for a plurality of clocks; and a signal reading unit that scans and reads out a signal value stored in the register.
Fujitsu Limited
G
G06F
inventional
Ryuji Hideo
Kan Yamashita