Vierra Magen Marcus LLP
Techniques for programming of select gates in NAND memory
In a non-volatile memory formed according to a NAND-type architecture that has, on one or both ends of the NAND strings, multiple select gates including some with programmable threshold voltages, a structure and corresponding for efficiently programming of such select gates. On the drain side, the end most of multiple drain select transistors is individually controllable and used for biasing purposes while one or more other drain side select gates are collectively programmed to set adjust their threshold voltage. Independently, on the source side, the end most of multiple source select transistors is individually controllable and used for biasing purposes while other source side select gates are collectively programmed to set adjust their threshold voltage.
SanDisk Technologies LLC
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Hao Yingda Khanh Man Toru Seungpil
Nguyen Dong Nguyen Mui Ishigaki Lee