Finnegan, Henderson, Farabow, Garrett & Dunner
Flip-flop circuit
 Disclosed is a flip-flop circuit capable of high speed and of low power consumption which has a master flip-flop including a logic gate circuit, and a slave flip-flop circuit also including a logic gate circuit, and a means for supplying a preset signal or a clear signal to the logic gate circuit of the slave flip-flop circuit or to an output logic circuit. Specifically, a binary type flip-flop circuit with preset/clear functions suitable for a ring counter and a ripple counter, and assembled by means of integrated circuit technology, is disclosed. 
Tokyo Shibaura Denki Kabushiki Kaisha
H
H03K
inventional
Minoru Yasoji
Takada Suzuki