Jones Day
Device with a high efficiency voltage multiplier
A device includes a capacitive element that is coupled between first and second nodes and that includes a first well region, a second well region, and a transistor. The second well region is formed in the first well region, has a different conductivity type than the first well region, and is coupled to the second node. The transistor includes source and drain regions formed in the second well region and coupled to each other and to the second node, a channel region between the source and drain regions, and a gate region over the channel region. The first well region and the gate region are coupled to each other and to the first node, whereby a capacitance of the capacitive element is increased without substantially enlarging a physical size of the capacitive element.
Taiwan Semiconductor Manufacturing Company Limited
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H01L H01L H01L G11C H02M
inventional inventional inventional inventional additional
Chih-Hsien Yu-Tso Seyednaser Min-Shueh Robert Bogdan
Chang Lin Pourmousavian Yuan Staszewski