Cushman, Darby & Cushman
Manufacturing method for a semiconductor isolation region
 In an element isolation method of a semiconductor device which can form an element isolation region having a flat surface without regard to the width of the element isolation region, and whose width is below the resolution limit, an insulating film having an aperture in order to define the element isolation region is formed on the semiconductor wafer, wherein an oxidizable material layer is deposited and then first spacers are formed on the sidewalls of the aperture. Then, a thermal oxide film is formed over the entire semiconductor wafer, excluding a first-spacer-formed region, and the first spacer is removed. The wafer surface is exposed to the lower part of the removed first spacer region, and then the portion of the semiconductor wafer below the exposed region is etched to thereby form a trench. After that, an element isolation region is formed by filling up the trench and removing the insulating film around tile trench. Additionally, a second spacer is formed on the sidewalls of the first spacer so as to further reduce the element isolation region. Accordingly, a highly integrated semiconductor device can be accomplished by forming an element isolation region whose size is below the resolution limit and whereby good element isolation characteristics are provided. 
Samsung Electronics Co., Ltd.
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Byeong-yeol Yun-gi Tai-seo Sung-tae Dong-chul
Kim Kim Park Ahn Park