Schwegman, Lundberg, Woessner & Kluth, P.A.
Sense amplifier circuit for detecting degradation of digit lines and method thereof
 To permit effective testing of a sense amplifier circuit, the sense amplifier is designed to be responsive to data stored in a selected memory cell in a controlled test mode. The sense amplifier circuit includes a pull-down circuit having delay circuit to receive and respond to a control signal which indicates whether the sensing circuit is to operate in test mode or normal mode. The sense amplifier circuit also includes an output circuit which is configured and arranged to generate a reference signal corresponding to the data stored in a selected memory cell. To permit sufficient time to test the circuit for correct data values at the output signal, the reference signal is delayed in response to the control signal indicating that the sensing circuit is to operate in test mode. 
Micron Technology, Inc.
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Daniel R. Roland
Loughmiller Ochoa