Farjami & Farjami LLP
Method and system for predictive multi-component circuit layout generation with reduced design cycle
One embodiment discloses receiving a number of parameter values for a multi-component circuit. From the received parameter values, a number of parasitic values for various components in the multi-component circuit are determined. For example, parasitic resistor values and parasitic capacitor values for transistors in the multi-component circuit are determined. The parasitic resistor values and parasitic capacitor values are used in simulating the multi-component circuit. According to a disclosed embodiment, a layout of the multi-component circuit is then generated that results in parasitic values that are the same as the parasitic values already used in simulating the multi-component circuit. As such, the parasitic values of the multi-component circuit have already been taken into account in the initial circuit simulation and there is no need to extract the internal parasitics of the multi-component circuit for further circuit simulations.
Conexant Systems, Inc.
G
G06F
inventional
Mishel Koen Paramjit Andy Bijan Paolo
Matloubian Lampaer Singh Brotman Bhattacharyya Miliozzi