Slater & Matsil, L.L.P.
Source and drain dislocation fabrication in FinFETs
A device includes a semiconductor fin over a substrate, a gate dielectric on sidewalls of the semiconductor fin, and a gate electrode over the gate dielectric. A source/drain region is on a side of the gate electrode. A dislocation plane is in the source/drain region.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Ting-Yun Tzer-Min Wen-Hsing Zhiqiang Ya-Yun Hua Feng Carlos H.
Wu Shen Hsieh Wu Cheng Chen Diaz