Fliesler, Dubb, Meyer & Lovejoy
Adjustable threshold voltage conversion circuit
 A flash EPROM circuit for providing a tight erase threshold voltage distribution. The circuit includes an array of memory cells having gates, sources and drains. Bit lines are coupled to the drains of a column of cells in the memory array. A plurality of word lines are each coupled to the gates of a row of cells in the memory array. A first voltage source is coupled to the bit lines to converge threshold voltages of erased memory cells. A second voltage source is coupled to the word lines to control the threshold voltages of the erased memory cells. 
Advanced Micro Devices, Inc.
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Lee E. Nader Ming-Sang Jian Shane David
Cleveland Radjy Kwan Chen Hollmer Liu