Haynes and Boone, LLP
FinFET device with high-k metal gate stack
The present disclosure provides a semiconductor device that includes a substrate, a first fin structure over the substrate. The first fin structure includes a first semiconductor material layer, having a semiconductor oxide layer as its outer layer, as a lower portion of the first fin structure. The first semiconductor has a first width. The first fin structure also includes a second semiconductor material layer as an upper portion of the first fin structure. The second semiconductor material layer has a third width, which is substantially smaller than the first width. The semiconductor structure also includes a gate region formed over a portion of the first fin and a high-k (HK)/metal gate (MG) stack on the substrate including wrapping over a portion of the first fin structure in the gate region.
Taiwan Semiconductor Manufacturing Company, Ltd.
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Chih-Sheng Kuo-Cheng Zhiqiang Ka-Hing
Chang Ching Wu Fung