Trop, Pruner & Hu, P.C.
System, apparatus and method for selective enabling of locality-based instruction handling
In an embodiment, a processor includes a sparse access buffer having a plurality of entries each to store for a memory access instruction to a particular address, address information and count information; and a memory controller to issue read requests to a memory, the memory controller including a locality controller to receive a memory access instruction having a no-locality hint and override the no-locality hint based at least in part on the count information stored in an entry of the sparse access buffer. Other embodiments are described and claimed.
Intel Corporation
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Christopher J. Rajat Berkin Jong Soo Chiachen
Hughes Agarwal Akin Park Chou